Symbol: SH_MEM_BASES__PRIVATE_BASE__SHIFT
drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h
7778
#define SH_MEM_BASES__PRIVATE_BASE__SHIFT 0x0
drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_sh_mask.h
8113
#define SH_MEM_BASES__PRIVATE_BASE__SHIFT 0x0
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_0_sh_mask.h
24672
#define SH_MEM_BASES__PRIVATE_BASE__SHIFT 0x0
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_3_sh_mask.h
27028
#define SH_MEM_BASES__PRIVATE_BASE__SHIFT 0x0
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_5_0_sh_mask.h
20733
#define SH_MEM_BASES__PRIVATE_BASE__SHIFT 0x0
drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_0_0_sh_mask.h
32587
#define SH_MEM_BASES__PRIVATE_BASE__SHIFT 0x0
drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_1_0_sh_mask.h
33128
#define SH_MEM_BASES__PRIVATE_BASE__SHIFT 0xa
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h
2226
#define SH_MEM_BASES__PRIVATE_BASE__SHIFT 0x0
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h
2074
#define SH_MEM_BASES__PRIVATE_BASE__SHIFT 0x0
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h
2097
#define SH_MEM_BASES__PRIVATE_BASE__SHIFT 0x0
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_2_sh_mask.h
25527
#define SH_MEM_BASES__PRIVATE_BASE__SHIFT 0x0
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_3_sh_mask.h
2244
#define SH_MEM_BASES__PRIVATE_BASE__SHIFT 0x0
drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h
12654
#define SH_MEM_BASES__PRIVATE_BASE__SHIFT 0x0
drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h
14540
#define SH_MEM_BASES__PRIVATE_BASE__SHIFT 0x0
drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h
14938
#define SH_MEM_BASES__PRIVATE_BASE__SHIFT 0x0