drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h

34151

#define RLC_CGCG_CGLS_CTRL_3D__CGLS_EN_MASK 0x00000002L

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_sh_mask.h

33236

#define RLC_CGCG_CGLS_CTRL_3D__CGLS_EN_MASK 0x00000002L

drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_0_sh_mask.h

34856

#define RLC_CGCG_CGLS_CTRL_3D__CGLS_EN_MASK 0x00000002L

drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_3_sh_mask.h

38151

#define RLC_CGCG_CGLS_CTRL_3D__CGLS_EN_MASK 0x00000002L

drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_5_0_sh_mask.h

30459

#define RLC_CGCG_CGLS_CTRL_3D__CGLS_EN_MASK 0x00000002L

drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_0_0_sh_mask.h

20520

#define RLC_CGCG_CGLS_CTRL_3D__CGLS_EN_MASK 0x00000002L

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h

23754

#define RLC_CGCG_CGLS_CTRL_3D__CGLS_EN_MASK 0x00000002L

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h

25041

#define RLC_CGCG_CGLS_CTRL_3D__CGLS_EN_MASK 0x00000002L

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h

25104

#define RLC_CGCG_CGLS_CTRL_3D__CGLS_EN_MASK 0x00000002L