drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h

34150

#define RLC_CGCG_CGLS_CTRL_3D__CGCG_EN_MASK 0x00000001L

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_sh_mask.h

33235

#define RLC_CGCG_CGLS_CTRL_3D__CGCG_EN_MASK 0x00000001L

drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_0_sh_mask.h

34855

#define RLC_CGCG_CGLS_CTRL_3D__CGCG_EN_MASK 0x00000001L

drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_3_sh_mask.h

38150

#define RLC_CGCG_CGLS_CTRL_3D__CGCG_EN_MASK 0x00000001L

drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_5_0_sh_mask.h

30458

#define RLC_CGCG_CGLS_CTRL_3D__CGCG_EN_MASK 0x00000001L

drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_0_0_sh_mask.h

20519

#define RLC_CGCG_CGLS_CTRL_3D__CGCG_EN_MASK 0x00000001L

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h

23753

#define RLC_CGCG_CGLS_CTRL_3D__CGCG_EN_MASK 0x00000001L

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h

25040

#define RLC_CGCG_CGLS_CTRL_3D__CGCG_EN_MASK 0x00000001L

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h

25103

#define RLC_CGCG_CGLS_CTRL_3D__CGCG_EN_MASK 0x00000001L