drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h

1584

#define REFCLK_CGTT_BLK_CTRL_REG__REFCLK_TURN_ON_DELAY__SHIFT 0x0

drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h

1522

#define REFCLK_CGTT_BLK_CTRL_REG__REFCLK_TURN_ON_DELAY__SHIFT 0x0

drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h

1650

#define REFCLK_CGTT_BLK_CTRL_REG__REFCLK_TURN_ON_DELAY__SHIFT 0x0

drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h

2410

#define REFCLK_CGTT_BLK_CTRL_REG__REFCLK_TURN_ON_DELAY__SHIFT 0x0

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_sh_mask.h

1840

#define REFCLK_CGTT_BLK_CTRL_REG__REFCLK_TURN_ON_DELAY__SHIFT 0x0

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h

460

#define REFCLK_CGTT_BLK_CTRL_REG__REFCLK_TURN_ON_DELAY__SHIFT 0x0

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_sh_mask.h

342

#define REFCLK_CGTT_BLK_CTRL_REG__REFCLK_TURN_ON_DELAY__SHIFT 0x0

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_0_sh_mask.h

441

#define REFCLK_CGTT_BLK_CTRL_REG__REFCLK_TURN_ON_DELAY__SHIFT 0x0

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_1_sh_mask.h

739

#define REFCLK_CGTT_BLK_CTRL_REG__REFCLK_TURN_ON_DELAY__SHIFT 0x0

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_2_sh_mask.h

455

#define REFCLK_CGTT_BLK_CTRL_REG__REFCLK_TURN_ON_DELAY__SHIFT 0x0

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_3_sh_mask.h

414

#define REFCLK_CGTT_BLK_CTRL_REG__REFCLK_TURN_ON_DELAY__SHIFT 0x0

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_1_2_sh_mask.h

632

#define REFCLK_CGTT_BLK_CTRL_REG__REFCLK_TURN_ON_DELAY__SHIFT 0x0

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_1_4_sh_mask.h

8044

#define REFCLK_CGTT_BLK_CTRL_REG__REFCLK_TURN_ON_DELAY__SHIFT 0x0

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_1_5_sh_mask.h

139

#define REFCLK_CGTT_BLK_CTRL_REG__REFCLK_TURN_ON_DELAY__SHIFT 0x0

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_1_6_sh_mask.h

1158

#define REFCLK_CGTT_BLK_CTRL_REG__REFCLK_TURN_ON_DELAY__SHIFT 0x0

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_2_0_sh_mask.h

145

#define REFCLK_CGTT_BLK_CTRL_REG__REFCLK_TURN_ON_DELAY__SHIFT 0x0

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_2_1_sh_mask.h

144

#define REFCLK_CGTT_BLK_CTRL_REG__REFCLK_TURN_ON_DELAY__SHIFT 0x0

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_5_0_sh_mask.h

6253

#define REFCLK_CGTT_BLK_CTRL_REG__REFCLK_TURN_ON_DELAY__SHIFT 0x0

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_5_1_sh_mask.h

6232

#define REFCLK_CGTT_BLK_CTRL_REG__REFCLK_TURN_ON_DELAY__SHIFT 0x0

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_6_0_sh_mask.h

513

#define REFCLK_CGTT_BLK_CTRL_REG__REFCLK_TURN_ON_DELAY__SHIFT 0x0

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_4_1_0_sh_mask.h

132

#define REFCLK_CGTT_BLK_CTRL_REG__REFCLK_TURN_ON_DELAY__SHIFT 0x0