drivers/ata/pata_opti.c

39

READ_REG = 0, /* index of Read cycle timing register */

drivers/ata/pata_optidma.c

38

READ_REG = 0, /* index of Read cycle timing register */

drivers/atm/iphase.h

151

#define READ_REG 0x5

drivers/gpu/drm/amd/include/mes_v11_api_def.h

594

struct READ_REG {

drivers/gpu/drm/amd/include/mes_v12_api_def.h

753

struct READ_REG {

drivers/net/ethernet/tehuti/tehuti.h

97

#define READ_REG(pp, reg) readl(pp->pBdxRegs + reg)

drivers/parisc/sba_iommu.c

139

#define READ_REG(addr) READ_REG64(addr)

drivers/parisc/sba_iommu.c

142

#define READ_REG(addr) READ_REG32(addr)