Symbol: PHY_MUX4_PHY_MUX_CONTROL__HPO_HDMI_ENC_SEL_MASK
drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_4_2_0_sh_mask.h
32366
#define PHY_MUX4_PHY_MUX_CONTROL__HPO_HDMI_ENC_SEL_MASK 0x00000070L
drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_4_2_1_sh_mask.h
45255
#define PHY_MUX4_PHY_MUX_CONTROL__HPO_HDMI_ENC_SEL_MASK 0x00000070L