Symbol: PHY_MUX4_PHY_MUX_CONTROL__HPO_DP_ENC_SEL__SHIFT
drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_4_2_0_sh_mask.h
32364
#define PHY_MUX4_PHY_MUX_CONTROL__HPO_DP_ENC_SEL__SHIFT 0x8
drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_4_2_1_sh_mask.h
45253
#define PHY_MUX4_PHY_MUX_CONTROL__HPO_DP_ENC_SEL__SHIFT 0x8