Symbol: PLLU_HW_PWRDN_CFG0_SEQ_ENABLE
drivers/clk/tegra/clk-pll.c
220
#define PLLU_HW_PWRDN_CFG0_SEQ_ENABLE BIT(24)
drivers/clk/tegra/clk-tegra210.c
211
#define PLLU_HW_PWRDN_CFG0_SEQ_ENABLE BIT(24)