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PHY_CPHY_RX_CONTROL1
drivers/media/pci/intel/ipu6/ipu6-isys-jsl-phy.c
21
#define PHY_CPHY_RX_CONTROL1(x) (0x110 + 0x100 * (x))
drivers/staging/media/ipu7/ipu7-buttress-regs.h
425
#define PHY_CPHY_RX_CONTROL1(x) (0x110 + 0x100 * (x))