drivers/gpu/drm/amd/include/asic_reg/bif/bif_3_0_sh_mask.h

7293

#define PCIE_LC_STATUS1__LC_DETECTED_LINK_WIDTH__SHIFT 0x00000005

drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_sh_mask.h

2218

#define PCIE_LC_STATUS1__LC_DETECTED_LINK_WIDTH__SHIFT 0x5

drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_sh_mask.h

2806

#define PCIE_LC_STATUS1__LC_DETECTED_LINK_WIDTH__SHIFT 0x5

drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_1_sh_mask.h

3172

#define PCIE_LC_STATUS1__LC_DETECTED_LINK_WIDTH__SHIFT 0x5

drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_2_3_sh_mask.h

55038

#define PCIE_LC_STATUS1__LC_DETECTED_LINK_WIDTH__SHIFT 0x5

drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_4_3_0_sh_mask.h

32910

#define PCIE_LC_STATUS1__LC_DETECTED_LINK_WIDTH__SHIFT 0x5

drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_6_1_sh_mask.h

38965

#define PCIE_LC_STATUS1__LC_DETECTED_LINK_WIDTH__SHIFT 0x5

drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_0_sh_mask.h

74338

#define PCIE_LC_STATUS1__LC_DETECTED_LINK_WIDTH__SHIFT 0x5

drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_2_0_sh_mask.h

100373

#define PCIE_LC_STATUS1__LC_DETECTED_LINK_WIDTH__SHIFT 0x5

drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_4_sh_mask.h

43679

#define PCIE_LC_STATUS1__LC_DETECTED_LINK_WIDTH__SHIFT 0x5

drivers/gpu/drm/amd/include/asic_reg/pcie/pcie_6_1_0_sh_mask.h

2613

#define PCIE_LC_STATUS1__LC_DETECTED_LINK_WIDTH__SHIFT 0x5