drivers/gpu/drm/amd/include/asic_reg/bif/bif_3_0_sh_mask.h

7104

#define PCIE_LC_LINK_WIDTH_CNTL__LC_L1_RECONFIG_EN_MASK 0x00020000L

drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_sh_mask.h

3275

#define PCIE_LC_LINK_WIDTH_CNTL__LC_L1_RECONFIG_EN_MASK 0x20000

drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_sh_mask.h

11023

#define PCIE_LC_LINK_WIDTH_CNTL__LC_L1_RECONFIG_EN_MASK 0x20000

drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_1_sh_mask.h

4229

#define PCIE_LC_LINK_WIDTH_CNTL__LC_L1_RECONFIG_EN_MASK 0x20000

drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_2_3_sh_mask.h

53833

#define PCIE_LC_LINK_WIDTH_CNTL__LC_L1_RECONFIG_EN_MASK 0x00020000L

drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_4_3_0_sh_mask.h

31581

#define PCIE_LC_LINK_WIDTH_CNTL__LC_L1_RECONFIG_EN_MASK 0x00020000L

drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_6_1_sh_mask.h

38050

#define PCIE_LC_LINK_WIDTH_CNTL__LC_L1_RECONFIG_EN_MASK 0x00020000L

drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_4_sh_mask.h

42690

#define PCIE_LC_LINK_WIDTH_CNTL__LC_L1_RECONFIG_EN_MASK 0x00020000L

drivers/gpu/drm/amd/include/asic_reg/pcie/pcie_6_1_0_sh_mask.h

717

#define PCIE_LC_LINK_WIDTH_CNTL__LC_L1_RECONFIG_EN_MASK 0x00020000L