drivers/gpu/drm/amd/include/asic_reg/bif/bif_3_0_sh_mask.h

7058

#define PCIE_LC_CNTL__LC_PMI_TO_L1_DIS_MASK 0x00010000L

drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_sh_mask.h

3013

#define PCIE_LC_CNTL__LC_PMI_TO_L1_DIS_MASK 0x10000

drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_sh_mask.h

10745

#define PCIE_LC_CNTL__LC_PMI_TO_L1_DIS_MASK 0x10000

drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_1_sh_mask.h

3967

#define PCIE_LC_CNTL__LC_PMI_TO_L1_DIS_MASK 0x10000

drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_2_3_sh_mask.h

53729

#define PCIE_LC_CNTL__LC_PMI_TO_L1_DIS_MASK 0x00010000L

drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_4_3_0_sh_mask.h

31482

#define PCIE_LC_CNTL__LC_PMI_TO_L1_DIS_MASK 0x00010000L

drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_6_1_sh_mask.h

37946

#define PCIE_LC_CNTL__LC_PMI_TO_L1_DIS_MASK 0x00010000L

drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_4_sh_mask.h

42586

#define PCIE_LC_CNTL__LC_PMI_TO_L1_DIS_MASK 0x00010000L

drivers/gpu/drm/amd/include/asic_reg/pcie/pcie_6_1_0_sh_mask.h

615

#define PCIE_LC_CNTL__LC_PMI_TO_L1_DIS_MASK 0x00010000L