drivers/gpu/drm/amd/include/asic_reg/bif/bif_3_0_sh_mask.h

7059

#define PCIE_LC_CNTL__LC_PMI_TO_L1_DIS__SHIFT 0x00000010

drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_sh_mask.h

3014

#define PCIE_LC_CNTL__LC_PMI_TO_L1_DIS__SHIFT 0x10

drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_sh_mask.h

10746

#define PCIE_LC_CNTL__LC_PMI_TO_L1_DIS__SHIFT 0x10

drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_1_sh_mask.h

3968

#define PCIE_LC_CNTL__LC_PMI_TO_L1_DIS__SHIFT 0x10

drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_2_3_sh_mask.h

53709

#define PCIE_LC_CNTL__LC_PMI_TO_L1_DIS__SHIFT 0x10

drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_4_3_0_sh_mask.h

31461

#define PCIE_LC_CNTL__LC_PMI_TO_L1_DIS__SHIFT 0x10

drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_6_1_sh_mask.h

37926

#define PCIE_LC_CNTL__LC_PMI_TO_L1_DIS__SHIFT 0x10

drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_4_sh_mask.h

42566

#define PCIE_LC_CNTL__LC_PMI_TO_L1_DIS__SHIFT 0x10

drivers/gpu/drm/amd/include/asic_reg/pcie/pcie_6_1_0_sh_mask.h

594

#define PCIE_LC_CNTL__LC_PMI_TO_L1_DIS__SHIFT 0x10