drivers/gpu/drm/amd/include/asic_reg/bif/bif_3_0_sh_mask.h

7054

#define PCIE_LC_CNTL__LC_L1_INACTIVITY_MASK 0x0000f000L

drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_sh_mask.h

3011

#define PCIE_LC_CNTL__LC_L1_INACTIVITY_MASK 0xf000

drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_sh_mask.h

10743

#define PCIE_LC_CNTL__LC_L1_INACTIVITY_MASK 0xf000

drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_1_sh_mask.h

3965

#define PCIE_LC_CNTL__LC_L1_INACTIVITY_MASK 0xf000

drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_2_3_sh_mask.h

53728

#define PCIE_LC_CNTL__LC_L1_INACTIVITY_MASK 0x0000F000L

drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_4_3_0_sh_mask.h

31481

#define PCIE_LC_CNTL__LC_L1_INACTIVITY_MASK 0x0000F000L

drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_6_1_sh_mask.h

37945

#define PCIE_LC_CNTL__LC_L1_INACTIVITY_MASK 0x0000F000L

drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_4_sh_mask.h

42585

#define PCIE_LC_CNTL__LC_L1_INACTIVITY_MASK 0x0000F000L

drivers/gpu/drm/amd/include/asic_reg/pcie/pcie_6_1_0_sh_mask.h

614

#define PCIE_LC_CNTL__LC_L1_INACTIVITY_MASK 0x0000F000L