drivers/gpu/drm/amd/include/asic_reg/bif/bif_3_0_sh_mask.h

7055

#define PCIE_LC_CNTL__LC_L1_INACTIVITY__SHIFT 0x0000000c

drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_sh_mask.h

3012

#define PCIE_LC_CNTL__LC_L1_INACTIVITY__SHIFT 0xc

drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_sh_mask.h

10744

#define PCIE_LC_CNTL__LC_L1_INACTIVITY__SHIFT 0xc

drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_1_sh_mask.h

3966

#define PCIE_LC_CNTL__LC_L1_INACTIVITY__SHIFT 0xc

drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_2_3_sh_mask.h

53708

#define PCIE_LC_CNTL__LC_L1_INACTIVITY__SHIFT 0xc

drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_4_3_0_sh_mask.h

31460

#define PCIE_LC_CNTL__LC_L1_INACTIVITY__SHIFT 0xc

drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_6_1_sh_mask.h

37925

#define PCIE_LC_CNTL__LC_L1_INACTIVITY__SHIFT 0xc

drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_4_sh_mask.h

42565

#define PCIE_LC_CNTL__LC_L1_INACTIVITY__SHIFT 0xc

drivers/gpu/drm/amd/include/asic_reg/pcie/pcie_6_1_0_sh_mask.h

593

#define PCIE_LC_CNTL__LC_L1_INACTIVITY__SHIFT 0xc