Symbol: OP_TLBI_VAE1ISNXS
arch/arm64/include/asm/sysreg.h
706
#define OP_TLBI_VAE1ISNXS sys_insn(1, 0, 9, 3, 1)
arch/arm64/kvm/emulate-nested.c
1494
SR_FGF(OP_TLBI_VAE1ISNXS, HFGITR, TLBIVAE1IS, 1, HCRX_FGTnXS),
arch/arm64/kvm/emulate-nested.c
777
SR_TRAP(OP_TLBI_VAE1ISNXS, CGT_HCR_TTLB_TTLBIS),
tools/arch/arm64/include/asm/sysreg.h
724
#define OP_TLBI_VAE1ISNXS sys_insn(1, 0, 9, 3, 1)