Symbol: OP_TLBI_VAALE1ISNXS
arch/arm64/include/asm/sysreg.h
710
#define OP_TLBI_VAALE1ISNXS sys_insn(1, 0, 9, 3, 7)
arch/arm64/kvm/emulate-nested.c
1490
SR_FGF(OP_TLBI_VAALE1ISNXS, HFGITR, TLBIVAALE1IS, 1, HCRX_FGTnXS),
arch/arm64/kvm/emulate-nested.c
781
SR_TRAP(OP_TLBI_VAALE1ISNXS, CGT_HCR_TTLB_TTLBIS),
tools/arch/arm64/include/asm/sysreg.h
728
#define OP_TLBI_VAALE1ISNXS sys_insn(1, 0, 9, 3, 7)