Symbol: OP_TLBI_RVALE1ISNXS
arch/arm64/include/asm/sysreg.h
703
#define OP_TLBI_RVALE1ISNXS sys_insn(1, 0, 9, 2, 5)
arch/arm64/kvm/emulate-nested.c
1487
SR_FGF(OP_TLBI_RVALE1ISNXS, HFGITR, TLBIRVALE1IS, 1, HCRX_FGTnXS),
arch/arm64/kvm/emulate-nested.c
774
SR_TRAP(OP_TLBI_RVALE1ISNXS, CGT_HCR_TTLB_TTLBIS),
tools/arch/arm64/include/asm/sysreg.h
721
#define OP_TLBI_RVALE1ISNXS sys_insn(1, 0, 9, 2, 5)