Symbol: OP_TLBI_RVAALE1ISNXS
arch/arm64/include/asm/sysreg.h
704
#define OP_TLBI_RVAALE1ISNXS sys_insn(1, 0, 9, 2, 7)
arch/arm64/kvm/emulate-nested.c
1486
SR_FGF(OP_TLBI_RVAALE1ISNXS, HFGITR, TLBIRVAALE1IS, 1, HCRX_FGTnXS),
arch/arm64/kvm/emulate-nested.c
775
SR_TRAP(OP_TLBI_RVAALE1ISNXS, CGT_HCR_TTLB_TTLBIS),
tools/arch/arm64/include/asm/sysreg.h
722
#define OP_TLBI_RVAALE1ISNXS sys_insn(1, 0, 9, 2, 7)