Symbol: OP_TLBI_ASIDE1ISNXS
arch/arm64/include/asm/sysreg.h
707
#define OP_TLBI_ASIDE1ISNXS sys_insn(1, 0, 9, 3, 2)
arch/arm64/kvm/emulate-nested.c
1493
SR_FGF(OP_TLBI_ASIDE1ISNXS, HFGITR, TLBIASIDE1IS, 1, HCRX_FGTnXS),
arch/arm64/kvm/emulate-nested.c
778
SR_TRAP(OP_TLBI_ASIDE1ISNXS, CGT_HCR_TTLB_TTLBIS),
tools/arch/arm64/include/asm/sysreg.h
725
#define OP_TLBI_ASIDE1ISNXS sys_insn(1, 0, 9, 3, 2)