Symbol: OP_TLBI_ASIDE1
arch/arm64/include/asm/sysreg.h
691
#define OP_TLBI_ASIDE1 sys_insn(1, 0, 8, 7, 2)
arch/arm64/kvm/emulate-nested.c
1448
SR_FGT(OP_TLBI_ASIDE1, HFGITR, TLBIASIDE1, 1),
arch/arm64/kvm/emulate-nested.c
748
SR_TRAP(OP_TLBI_ASIDE1, CGT_HCR_TTLB),
tools/arch/arm64/include/asm/sysreg.h
709
#define OP_TLBI_ASIDE1 sys_insn(1, 0, 8, 7, 2)