NR_IRQS
# define NR_IRQS (128) /* max is RAWHIDE/TAKARA */
# define NR_IRQS (32768 + 16) /* marvel - 32 pids */
# define NR_IRQS 35
# define NR_IRQS 32
# define NR_IRQS 48
# define NR_IRQS 40
# define NR_IRQS 64
#define NR_IRQS 80
# define NR_IRQS 128
# define NR_IRQS 2048 /* enuff for 8 QBBs */
# define NR_IRQS (32768 + 16) /* marvel - 32 pids*/
# define NR_IRQS 16
#define NR_IRQS 512
#define NR_IRQS NR_IRQS_LEGACY
#define NR_IRQS 36
#define NR_IRQS 128
#define NR_IRQS (IRQ_BOARD_START + NR_IRQS_LOCOMO)
#define NR_IRQS 512
#define NR_IRQS (64 + NR_VECTORS * (NR_CPUS + MAX_IO_PICS))
#define NR_IRQS 256
#define NR_IRQS 200
#define NR_IRQS 141
#define NR_IRQS 72
#define NR_IRQS 43
#define NR_IRQS 32
#define NR_IRQS 24
#define NR_IRQS 8
#define NR_IRQS 51
#define NR_IRQS 128
#define NR_IRQS OCTEON_IRQ_LAST
#define NR_IRQS (GT641XX_PCI_INT3_IRQ + 1)
#undef NR_IRQS
#define NR_IRQS 152
#define NR_IRQS 256
#define NR_IRQS 256
#define NR_IRQS 328
#define NR_IRQS 256
#define NR_IRQS (NR_IRQS_LEGACY + NR_MIPS_CPU_IRQS + NR_MAX_CHAINED_IRQS + 256)
#define NR_IRQS 256
#define NR_IRQS 8
#define NR_IRQS 256
#define NR_IRQS 256
#define NR_IRQS 256
#define NR_IRQS 32
#define NR_IRQS (CPU_IRQ_MAX + 1)
#define NR_IRQS CONFIG_NR_IRQS
#define NR_IRQS NR_IRQS_BASE
#define NR_IRQS 64
#define NR_IRQS (2048)
#define NR_IRQS (UM_LAST_SIGNAL_IRQ + 64)
#define NR_IRQS UM_LAST_SIGNAL_IRQ
#define NR_IRQS \
#define NR_IRQS (NR_VECTORS + IO_APIC_VECTOR_LIMIT)
#define NR_IRQS (NR_VECTORS + CPU_VECTOR_LIMIT)
#define NR_IRQS NR_IRQS_LEGACY
#define NR_IRQS (XTENSA_NR_IRQS + PLATFORM_NR_IRQS + 1)
#define NR_IRQS 64
#define NR_IRQS \
#define NR_IRQS (NR_VECTORS + IO_APIC_VECTOR_LIMIT)
#define NR_IRQS (NR_VECTORS + CPU_VECTOR_LIMIT)
#define NR_IRQS NR_IRQS_LEGACY