drivers/gpu/drm/amd/include/asic_reg/nbif/nbif_6_3_1_sh_mask.h

20275

#define NBIF_MGCG_CTRL_LCLK__NBIF_MGCG_EN_LCLK_MASK 0x00000001L

drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_2_3_sh_mask.h

19475

#define NBIF_MGCG_CTRL_LCLK__NBIF_MGCG_EN_LCLK_MASK 0x00000001L

drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_4_3_0_sh_mask.h

57125

#define NBIF_MGCG_CTRL_LCLK__NBIF_MGCG_EN_LCLK_MASK 0x00000001L

drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_6_1_sh_mask.h

21926

#define NBIF_MGCG_CTRL_LCLK__NBIF_MGCG_EN_LCLK_MASK 0x00000001L

drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_0_sh_mask.h

35969

#define NBIF_MGCG_CTRL_LCLK__NBIF_MGCG_EN_LCLK_MASK 0x00000001L

drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_11_0_sh_mask.h

53149

#define NBIF_MGCG_CTRL_LCLK__NBIF_MGCG_EN_LCLK_MASK 0x00000001L

drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_2_0_sh_mask.h

48325

#define NBIF_MGCG_CTRL_LCLK__NBIF_MGCG_EN_LCLK_MASK 0x00000001L

drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_4_sh_mask.h

25149

#define NBIF_MGCG_CTRL_LCLK__NBIF_MGCG_EN_LCLK_MASK 0x00000001L

drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_7_0_sh_mask.h

44948

#define NBIF_MGCG_CTRL_LCLK__NBIF_MGCG_EN_LCLK_MASK 0x00000001L

drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_9_0_sh_mask.h

18782

#define NBIF_MGCG_CTRL_LCLK__NBIF_MGCG_EN_LCLK_MASK 0x00000001L