Symbol: MPLL_CNTL_MODE__MPLL_MCLK_SEL_MASK
drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h
11300
#define MPLL_CNTL_MODE__MPLL_MCLK_SEL_MASK 0x00000800L
drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h
9439
#define MPLL_CNTL_MODE__MPLL_MCLK_SEL_MASK 0x800
drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h
10353
#define MPLL_CNTL_MODE__MPLL_MCLK_SEL_MASK 0x800