Symbol: MC_SEQ_WR_CTL_D0__OEN_SEL__SHIFT
drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h
9551
#define MC_SEQ_WR_CTL_D0__OEN_SEL__SHIFT 0x00000014
drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h
6568
#define MC_SEQ_WR_CTL_D0__OEN_SEL__SHIFT 0x14
drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h
7482
#define MC_SEQ_WR_CTL_D0__OEN_SEL__SHIFT 0x14