Symbol: MC_SEQ_WR_CTL_2__WCDR_EN_MASK
drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h
9498
#define MC_SEQ_WR_CTL_2__WCDR_EN_MASK 0x00000040L
drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h
6615
#define MC_SEQ_WR_CTL_2__WCDR_EN_MASK 0x40
drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h
7529
#define MC_SEQ_WR_CTL_2__WCDR_EN_MASK 0x40