drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h

2239

#define MCIF_CONTROL__MCIF_MC_LATENCY_COUNTER_URGENT_ONLY_MASK 0x80000000

drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h

2191

#define MCIF_CONTROL__MCIF_MC_LATENCY_COUNTER_URGENT_ONLY_MASK 0x80000000

drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h

2387

#define MCIF_CONTROL__MCIF_MC_LATENCY_COUNTER_URGENT_ONLY_MASK 0x80000000

drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h

3654

#define MCIF_CONTROL__MCIF_MC_LATENCY_COUNTER_URGENT_ONLY_MASK 0x80000000L

drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h

7735

#define MCIF_CONTROL__MCIF_MC_LATENCY_COUNTER_URGENT_ONLY_MASK 0x80000000L

drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_sh_mask.h

2403

#define MCIF_CONTROL__MCIF_MC_LATENCY_COUNTER_URGENT_ONLY_MASK 0x80000000

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_sh_mask.h

7520

#define MCIF_CONTROL__MCIF_MC_LATENCY_COUNTER_URGENT_ONLY_MASK 0x80000000L

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h

7193

#define MCIF_CONTROL__MCIF_MC_LATENCY_COUNTER_URGENT_ONLY_MASK 0x80000000L

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_sh_mask.h

6925

#define MCIF_CONTROL__MCIF_MC_LATENCY_COUNTER_URGENT_ONLY_MASK 0x80000000L

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_0_sh_mask.h

6846

#define MCIF_CONTROL__MCIF_MC_LATENCY_COUNTER_URGENT_ONLY_MASK 0x80000000L

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_1_sh_mask.h

6906

#define MCIF_CONTROL__MCIF_MC_LATENCY_COUNTER_URGENT_ONLY_MASK 0x80000000L

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_2_sh_mask.h

6737

#define MCIF_CONTROL__MCIF_MC_LATENCY_COUNTER_URGENT_ONLY_MASK 0x80000000L

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_3_sh_mask.h

5405

#define MCIF_CONTROL__MCIF_MC_LATENCY_COUNTER_URGENT_ONLY_MASK 0x80000000L

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_1_2_sh_mask.h

7347

#define MCIF_CONTROL__MCIF_MC_LATENCY_COUNTER_URGENT_ONLY_MASK 0x80000000L

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_1_4_sh_mask.h

15059

#define MCIF_CONTROL__MCIF_MC_LATENCY_COUNTER_URGENT_ONLY_MASK 0x80000000L

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_1_5_sh_mask.h

5285

#define MCIF_CONTROL__MCIF_MC_LATENCY_COUNTER_URGENT_ONLY_MASK 0x80000000L

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_1_6_sh_mask.h

8002

#define MCIF_CONTROL__MCIF_MC_LATENCY_COUNTER_URGENT_ONLY_MASK 0x80000000L

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_2_0_sh_mask.h

4569

#define MCIF_CONTROL__MCIF_MC_LATENCY_COUNTER_URGENT_ONLY_MASK 0x80000000L

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_2_1_sh_mask.h

4570

#define MCIF_CONTROL__MCIF_MC_LATENCY_COUNTER_URGENT_ONLY_MASK 0x80000000L