drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_sh_mask.h

494

#define JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT 0x0

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h

1016

#define JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT 0x0

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h

1352

#define JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT 0x0

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h

1355

#define JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT 0x0

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_6_0_sh_mask.h

2269

#define JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT 0x0

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_3_0_0_sh_mask.h

1877

#define JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT 0x0

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_4_0_0_sh_mask.h

6169

#define JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT 0x0

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_4_0_3_sh_mask.h

6894

#define JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT 0x0

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_4_0_5_sh_mask.h

5995

#define JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT 0x0

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_5_0_0_sh_mask.h

5228

#define JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT 0x0

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_5_3_0_sh_mask.h

7250

#define JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT 0x0