drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h

39694

#define GRBM_CAM_DATA__CAM_REMAPADDR__SHIFT 0x10

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_sh_mask.h

36381

#define GRBM_CAM_DATA__CAM_REMAPADDR__SHIFT 0x10

drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_0_sh_mask.h

38567

#define GRBM_CAM_DATA__CAM_REMAPADDR__SHIFT 0x10

drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_3_sh_mask.h

41569

#define GRBM_CAM_DATA__CAM_REMAPADDR__SHIFT 0x10

drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_5_0_sh_mask.h

33774

#define GRBM_CAM_DATA__CAM_REMAPADDR__SHIFT 0x10

drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_0_0_sh_mask.h

22986

#define GRBM_CAM_DATA__CAM_REMAPADDR__SHIFT 0x10

drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_1_0_sh_mask.h

22368

#define GRBM_CAM_DATA__CAM_REMAPADDR__SHIFT 0x10

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h

27210

#define GRBM_CAM_DATA__CAM_REMAPADDR__SHIFT 0x10

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h

28488

#define GRBM_CAM_DATA__CAM_REMAPADDR__SHIFT 0x10

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h

28816

#define GRBM_CAM_DATA__CAM_REMAPADDR__SHIFT 0x10

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_2_sh_mask.h

14379

#define GRBM_CAM_DATA__CAM_REMAPADDR__SHIFT 0x10

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_3_sh_mask.h

31242

#define GRBM_CAM_DATA__CAM_REMAPADDR__SHIFT 0x10

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_sh_mask.h

4591

#define GRBM_CAM_DATA__CAM_REMAPADDR__SHIFT 0x00000010

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h

4738

#define GRBM_CAM_DATA__CAM_REMAPADDR__SHIFT 0x10

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h

5474

#define GRBM_CAM_DATA__CAM_REMAPADDR__SHIFT 0x10

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h

6002

#define GRBM_CAM_DATA__CAM_REMAPADDR__SHIFT 0x10