usr/src/uts/common/io/iwp/iwp.c

1695

if (IWP_CMD_QUEUE_NUM == i) {

usr/src/uts/common/io/iwp/iwp.c

1709

err = iwp_alloc_tx_ring(sc, &sc->sc_txq[IWP_CMD_QUEUE_NUM],

usr/src/uts/common/io/iwp/iwp.c

1710

TFD_CMD_SLOTS, IWP_CMD_QUEUE_NUM);

usr/src/uts/common/io/iwp/iwp.c

3742

iwp_tx_ring_t *ring = &sc->sc_txq[IWP_CMD_QUEUE_NUM];

usr/src/uts/common/io/iwp/iwp.c

3907

iwp_tx_ring_t *ring = &sc->sc_txq[IWP_CMD_QUEUE_NUM];

usr/src/uts/common/io/iwp/iwp.c

4968

IWP_WRITE(sc, HBUS_TARG_WRPTR, (IWP_CMD_QUEUE_NUM << 8));

usr/src/uts/common/io/iwp/iwp.c

4969

iwp_reg_write(sc, IWP_SCD_QUEUE_RDPTR(IWP_CMD_QUEUE_NUM), 0);

usr/src/uts/common/io/iwp/iwp.c

4983

iwp_reg_write(sc, IWP_SCD_QUEUE_STATUS_BITS(IWP_CMD_QUEUE_NUM),

usr/src/uts/common/io/iwp/iwp_hw.h

2603

(~(1 << IWP_CMD_QUEUE_NUM)))