IWH_READ
if (IWH_READ(sc, FH_MEM_RSSR_RX_STATUS_REG) & (1 << 24)) {
if (IWH_READ(sc, IWH_FH_TSSR_TX_STATUS_REG) &
tmp = IWH_READ(sc, CSR_GP_CNTRL);
if ((IWH_READ(sc, CSR_GP_CNTRL) &
uint32_t tmp = IWH_READ(sc, CSR_GP_CNTRL);
return (IWH_READ(sc, HBUS_TARG_PRPH_RDAT));
r = IWH_READ(sc, CSR_INT);
rfh = IWH_READ(sc, CSR_FH_INT_STATUS);
uint32_t tmp = IWH_READ(sc, CSR_GP_CNTRL);
tmp = IWH_READ(sc, CSR_GP_CNTRL);
tmp = IWH_READ(sc, CSR_RESET);
tmp = IWH_READ(sc, CSR_GP_CNTRL);
if (IWH_READ(sc, CSR_RESET) &
tmp = IWH_READ(sc, CSR_GIO_CHICKEN_BITS);
tmp = IWH_READ(sc, CSR_ANA_PLL_CFG);
tmp = IWH_READ(sc, CSR_GP_CNTRL);
if (IWH_READ(sc, CSR_GP_CNTRL) &
tmp = IWH_READ(sc, CSR_HW_IF_CONFIG_REG);
tmp = IWH_READ(sc, CSR_HW_IF_CONFIG_REG);
tmp = IWH_READ(sc, CSR_HW_IF_CONFIG_REG);
if (IWH_READ(sc, CSR_HW_IF_CONFIG_REG) &
tmp = IWH_READ(sc, CSR_HW_IF_CONFIG_REG);
eep_gp = IWH_READ(sc, CSR_EEPROM_GP);
tmp = IWH_READ(sc, CSR_EEPROM_REG);
rv = IWH_READ(sc, CSR_EEPROM_REG);
tmp = IWH_READ(sc, CSR_RESET);
tmp = IWH_READ(sc, CSR_GP_CNTRL);
sc->sc_hw_rev = IWH_READ(sc, CSR_HW_REV);
tmp = IWH_READ(sc, CSR_HW_IF_CONFIG_REG);
if (IWH_READ(sc, CSR_HW_IF_CONFIG_REG) &
tmp = IWH_READ(sc, CSR_HW_IF_CONFIG_REG);
if (0 == (IWH_READ(sc, CSR_HW_IF_CONFIG_REG) &
tmp = IWH_READ(sc, CSR_HW_IF_CONFIG_REG);
if (IWH_READ(sc, CSR_HW_IF_CONFIG_REG) &