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#define XSTORM_LICENSE_VALUES_OFFSET(pfId) (IRO[42].base + ((pfId) * IRO[42].m1))

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#define XSTORM_LICENSE_VALUES_SIZE (IRO[42].size)

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#define XSTORM_CMNG_PER_PORT_VARS_OFFSET(portId) (IRO[43].base + ((portId) * IRO[43].m1))

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#define XSTORM_CMNG_PER_PORT_VARS_SIZE (IRO[43].size)

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#define XSTORM_RATE_SHAPING_PER_VN_VARS_OFFSET(pfId) (IRO[44].base + ((pfId) * IRO[44].m1))

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#define XSTORM_RATE_SHAPING_PER_VN_VARS_SIZE (IRO[44].size)

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#define XSTORM_FAIRNESS_PER_VN_VARS_OFFSET(pfId) (IRO[45].base + ((pfId) * IRO[45].m1))

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#define XSTORM_FAIRNESS_PER_VN_VARS_SIZE (IRO[45].size)

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#define XSTORM_PER_QUEUE_STATS_OFFSET(xStatQueueId) (IRO[46].base + ((xStatQueueId) * IRO[46].m1))

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#define XSTORM_PER_QUEUE_STATS_SIZE (IRO[46].size)

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#define XSTORM_FUNC_EN_OFFSET(funcId) (IRO[47].base + ((funcId) * IRO[47].m1))

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#define XSTORM_FUNC_EN_SIZE (IRO[47].size)

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#define XSTORM_VF_TO_PF_OFFSET(funcId) (IRO[48].base + ((funcId) * IRO[48].m1))

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#define XSTORM_VF_TO_PF_SIZE (IRO[48].size)

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#define XSTORM_RECORD_SLOW_PATH_OFFSET(funcId) (IRO[49].base + ((funcId) * IRO[49].m1))

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#define XSTORM_RECORD_SLOW_PATH_SIZE (IRO[49].size)

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#define XSTORM_ASSERT_LIST_OFFSET(assertListEntry) (IRO[50].base + ((assertListEntry) * IRO[50].m1))

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#define XSTORM_ASSERT_LIST_SIZE (IRO[50].size)

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#define XSTORM_ASSERT_LIST_INDEX_OFFSET (IRO[51].base)

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#define XSTORM_ASSERT_LIST_INDEX_SIZE (IRO[51].size)

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#define XSTORM_TIME_SYNC_TEST_ADDRESS_OFFSET (IRO[52].base)

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#define XSTORM_TIME_SYNC_TEST_ADDRESS_SIZE (IRO[52].size)

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#define PCI_READ_KUKUE_CODE_OPPCOE (IRO[53].base)

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#define LOAD_CONTEXT_KUKUE_CODE_OPPCOE (IRO[54].base)

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#define QM_PAUSE_KUKUE_CODE_OPPCOE (IRO[55].base)

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#define PAUSE_TEST_XOFF_PORT0_KUKUE_CODE_OPPCOE (IRO[56].base)

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#define PAUSE_TEST_XON_PORT0_KUKUE_CODE_OPPCOE (IRO[57].base)

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#define PAUSE_TEST_XOFF_PORT1_KUKUE_CODE_OPPCOE (IRO[58].base)

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#define PAUSE_TEST_XON_PORT1_KUKUE_CODE_OPPCOE (IRO[59].base)

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#define TEST_UNUSED_FOCS_KUKUE_CODE_OPPCOE (IRO[60].base)

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#define PBF_ECHO_KUKUE_CODE_OPPCOE (IRO[61].base)

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#define TIME_SYNC_PORT0_KUKUE_CODE_OPPCOE (IRO[62].base)

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#define TIME_SYNC_PORT1_KUKUE_CODE_OPPCOE (IRO[63].base)

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#define IGU_TEST_KUKUE_CODE_OPPCOE (IRO[64].base)

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#define XSTORM_AGG_INT_INITIAL_CLEANUP_INDEX (IRO[65].base)

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#define XSTORM_AGG_INT_FINAL_CLEANUP_INDEX (IRO[66].base)

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#define XSTORM_AGG_INT_FINAL_CLEANUP_COMP_TYPE (IRO[67].base)

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#define XSTORM_ERROR_HANDLER_STATISTICS_RAM_OFFSET (IRO[68].base)

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#define XSTORM_ERROR_HANDLER_STATISTICS_RAM_SIZE (IRO[68].size)

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#define XSTORM_LB_PHYSICAL_QUEUES_INFO_OFFSET (IRO[69].base)

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#define XSTORM_LB_PHYSICAL_QUEUES_INFO_SIZE (IRO[69].size)

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#define XSTORM_QUEUE_ZONE_OFFSET(queueId) (IRO[70].base + ((queueId) * IRO[70].m1))

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#define XSTORM_QUEUE_ZONE_SIZE (IRO[70].size)

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#define XSTORM_VF_ZONE_OFFSET(vfId) (IRO[71].base + ((vfId) * IRO[71].m1))

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#define XSTORM_VF_ZONE_SIZE (IRO[71].size)

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#define XSTORM_FIVE_TUPLE_SRC_EN_OFFSET (IRO[72].base)

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#define XSTORM_FIVE_TUPLE_SRC_EN_SIZE (IRO[72].size)

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#define XSTORM_E2_INTEG_RAM_OFFSET (IRO[73].base)

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#define XSTORM_E2_INTEG_RAM_SIZE (IRO[73].size)

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#define XSTORM_QM_OPPORTUNISTIC_RAM_OFFSET (IRO[74].base)

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#define XSTORM_QM_OPPORTUNISTIC_RAM_SIZE (IRO[74].size)

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#define XSTORM_SIDE_INFO_INPUT_LSB_OFFSET (IRO[75].base)

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#define XSTORM_SIDE_INFO_INPUT_LSB_SIZE (IRO[75].size)

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#define XSTORM_E2_INTEG_VLAN_ID_OFFSET (IRO[76].base)

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#define XSTORM_E2_INTEG_VLAN_ID_SIZE (IRO[76].size)

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#define XSTORM_E2_INTEG_VLAN_ID_EN_OFFSET (IRO[77].base)

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#define XSTORM_E2_INTEG_VLAN_ID_EN_SIZE (IRO[77].size)

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#define XSTORM_VFC_TEST_LINE_OFFSET (IRO[78].base)

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#define XSTORM_VFC_TEST_LINE_SIZE (IRO[78].size)

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#define XSTORM_VFC_TEST_RESULT_OFFSET (IRO[79].base)

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#define XSTORM_VFC_TEST_RESULT_SIZE (IRO[79].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

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#define XSTORM_VFC_OP_GEN_VALUE (IRO[80].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

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#define XSTORM_INBOUND_INTERRUPT_TEST_VF_INFO_SIZE_IN_BYTES (IRO[81].base)

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#define XSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_1_INDEX (IRO[82].base)

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#define XSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_2_INDEX (IRO[83].base)

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#define XSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_3_INDEX (IRO[84].base)

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#define XSTORM_DPM_BUFFER_OFFSET (IRO[85].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

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#define XSTORM_DPM_BUFFER_SIZE (IRO[85].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

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#define XSTORM_KUKU_TEST_OPCODE_OFFSET (IRO[86].base)

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#define XSTORM_KUKU_TEST_OPCODE_SIZE (IRO[86].size)

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#define XSTORM_KUKU_LOAD_CONTEXT_TEST_OFFSET (IRO[87].base)

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#define XSTORM_KUKU_LOAD_CONTEXT_TEST_SIZE (IRO[87].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

184

#define XSTORM_KUKU_OP_GEN_VALUE (IRO[88].base)

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185

#define XSTORM_QM_PAUSE_TEST_QUEUE_MASK_OFFSET (IRO[89].base)

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#define XSTORM_QM_PAUSE_TEST_QUEUE_MASK_SIZE (IRO[89].size)

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#define XSTORM_QM_PAUSE_TEST_GROUP_OFFSET (IRO[90].base)

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#define XSTORM_QM_PAUSE_TEST_GROUP_SIZE (IRO[90].size)

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189

#define XSTORM_QM_PAUSE_TEST_PORT_OFFSET (IRO[91].base)

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190

#define XSTORM_QM_PAUSE_TEST_PORT_SIZE (IRO[91].size)

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191

#define XSTORM_KUKU_PBF_ECHO_OPCODE (IRO[92].base)

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192

#define XSTORM_KUKU_PBF_ECHO_INCVAL (IRO[93].base)

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193

#define XSTORM_KUKU_PBF_ECHO_REGION (IRO[94].base)

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194

#define XSTORM_KUKU_PBF_ECHO_RUN_PBF_ECHO_TEST (IRO[95].base)

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195

#define XSTORM_KUKU_PBF_ECHO_CID (IRO[96].base)

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196

#define XSTORM_KUKU_PBF_ECHO_SUCCESS_VALUE (IRO[97].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

197

#define XSTORM_KUKU_TIME_SYNC_FLG_OFFSET(funcId) (IRO[98].base + ((funcId) * IRO[98].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

198

#define XSTORM_KUKU_TIME_SYNC_FLG_SIZE (IRO[98].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

199

#define TSTORM_INDIRECTION_TABLE_ENTRY_SIZE (IRO[99].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

201

#define TSTORM_COMMON_RTC_PARAMS_OFFSET (IRO[100].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

202

#define TSTORM_COMMON_RTC_PARAMS_SIZE (IRO[100].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

204

#define TSTORM_ASSERT_LIST_OFFSET(assertListEntry) (IRO[101].base + ((assertListEntry) * IRO[101].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

205

#define TSTORM_ASSERT_LIST_SIZE (IRO[101].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

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#define TSTORM_ASSERT_LIST_INDEX_OFFSET (IRO[102].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

208

#define TSTORM_ASSERT_LIST_INDEX_SIZE (IRO[102].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

210

#define TSTORM_MEASURE_PCI_LATENCY_CTRL_OFFSET (IRO[103].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

211

#define TSTORM_MEASURE_PCI_LATENCY_CTRL_SIZE (IRO[103].size)

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#define TSTORM_MEASURE_PCI_LATENCY_DATA_OFFSET (IRO[104].base)

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214

#define TSTORM_MEASURE_PCI_LATENCY_DATA_SIZE (IRO[104].size)

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215

#define TSTORM_AGG_MEASURE_PCI_LATENCY_INDEX (IRO[105].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

216

#define TSTORM_AGG_MEASURE_PCI_LATENCY_COMP_TYPE (IRO[106].base)

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#define TSTORM_FUNC_EN_OFFSET(funcId) (IRO[107].base + ((funcId) * IRO[107].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

219

#define TSTORM_FUNC_EN_SIZE (IRO[107].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

221

#define TSTORM_VF_TO_PF_OFFSET(funcId) (IRO[108].base + ((funcId) * IRO[108].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

222

#define TSTORM_VF_TO_PF_SIZE (IRO[108].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

224

#define TSTORM_RECORD_SLOW_PATH_OFFSET(funcId) (IRO[109].base + ((funcId) * IRO[109].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

225

#define TSTORM_RECORD_SLOW_PATH_SIZE (IRO[109].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

227

#define TSTORM_PER_QUEUE_STATS_OFFSET(tStatQueueId) (IRO[110].base + ((tStatQueueId) * IRO[110].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

228

#define TSTORM_PER_QUEUE_STATS_SIZE (IRO[110].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

230

#define TSTORM_COMMON_SAFC_WORKAROUND_ENABLE_OFFSET (IRO[111].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

231

#define TSTORM_COMMON_SAFC_WORKAROUND_ENABLE_SIZE (IRO[111].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

233

#define TSTORM_COMMON_SAFC_WORKAROUND_TIMEOUT_10USEC_OFFSET (IRO[112].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

234

#define TSTORM_COMMON_SAFC_WORKAROUND_TIMEOUT_10USEC_SIZE (IRO[112].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

236

#define TSTORM_ERROR_HANDLER_STATISTICS_RAM_OFFSET (IRO[113].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

237

#define TSTORM_ERROR_HANDLER_STATISTICS_RAM_SIZE (IRO[113].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

238

#define TSTORM_VFC_TEST_RSS_KEY_OFFSET(portId) (IRO[114].base + ((portId) * IRO[114].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

239

#define TSTORM_VFC_TEST_RSS_KEY_SIZE (IRO[114].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

241

#define TSTORM_QUEUE_ZONE_OFFSET(queueId) (IRO[115].base + ((queueId) * IRO[115].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

242

#define TSTORM_QUEUE_ZONE_SIZE (IRO[115].size)

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#define TSTORM_VF_ZONE_OFFSET(vfId) (IRO[116].base + ((vfId) * IRO[116].m1))

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#define TSTORM_VF_ZONE_SIZE (IRO[116].size)

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#define TSTORM_E2_INTEG_RAM_OFFSET (IRO[117].base)

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#define TSTORM_E2_INTEG_RAM_SIZE (IRO[117].size)

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#define TSTORM_LSB_SIDE_BAND_INFO_OFFSET (IRO[118].base)

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#define TSTORM_LSB_SIDE_BAND_INFO_SIZE (IRO[118].size)

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#define TSTORM_MSB_SIDE_BAND_INFO_OFFSET (IRO[119].base)

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#define TSTORM_MSB_SIDE_BAND_INFO_SIZE (IRO[119].size)

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#define TSTORM_VFC_TEST_LINE_OFFSET (IRO[120].base)

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#define TSTORM_VFC_TEST_LINE_SIZE (IRO[120].size)

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#define TSTORM_VFC_TEST_RESULT_OFFSET (IRO[121].base)

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#define TSTORM_VFC_TEST_RESULT_SIZE (IRO[121].size)

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#define TSTORM_VFC_OP_GEN_VALUE (IRO[122].base)

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#define TSTORM_INBOUND_INTERRUPT_TEST_VF_INFO_SIZE_IN_BYTES (IRO[123].base)

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#define TSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_1_INDEX (IRO[124].base)

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#define TSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_2_INDEX (IRO[125].base)

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#define TSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_3_INDEX (IRO[126].base)

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#define TSTORM_KUKU_TEST_OPCODE_OFFSET (IRO[127].base)

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#define TSTORM_KUKU_TEST_OPCODE_SIZE (IRO[127].size)

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#define TSTORM_KUKU_LOAD_CONTEXT_TEST_OFFSET (IRO[128].base)

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#define TSTORM_KUKU_LOAD_CONTEXT_TEST_SIZE (IRO[128].size)

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#define TSTORM_KUKU_OP_GEN_VALUE (IRO[129].base)

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#define TSTORM_PCI_READ_TEST_ADDRESS_LO_OFFSET (IRO[130].base)

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#define TSTORM_PCI_READ_TEST_ADDRESS_LO_SIZE (IRO[130].size)

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#define TSTORM_PCI_READ_TEST_ADDRESS_HI_OFFSET (IRO[131].base)

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#define TSTORM_PCI_READ_TEST_ADDRESS_HI_SIZE (IRO[131].size)

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#define TSTORM_PCI_READ_TEST_RAM_ADDRESS_OFFSET (IRO[132].base)

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#define TSTORM_PCI_READ_TEST_RAM_ADDRESS_SIZE (IRO[132].size)

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#define TSTORM_PCI_READ_TEST_PCI_ENTITY_OFFSET (IRO[133].base)

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#define TSTORM_PCI_READ_TEST_PCI_ENTITY_SIZE (IRO[133].size)

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#define TSTORM_TIME_SYNC_TEST_ADDRESS_OFFSET (IRO[134].base)

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#define TSTORM_TIME_SYNC_TEST_ADDRESS_SIZE (IRO[134].size)

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#define TSTORM_KUKU_NIG_PAUSE_TEST_MASK_OFFSET (IRO[135].base)

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#define TSTORM_KUKU_NIG_PAUSE_TEST_MASK_SIZE (IRO[135].size)

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#define CSTORM_STATUS_BLOCK_OFFSET(sbId) (IRO[136].base + ((sbId) * IRO[136].m1))

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#define CSTORM_STATUS_BLOCK_SIZE (IRO[136].size)

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#define CSTORM_STATUS_BLOCK_DATA_OFFSET(sbId) (IRO[137].base + ((sbId) * IRO[137].m1))

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#define CSTORM_STATUS_BLOCK_DATA_SIZE (IRO[137].size)

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#define CSTORM_STATUS_BLOCK_DATA_STATE_OFFSET(sbId) (IRO[138].base + ((sbId) * IRO[138].m1))

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#define CSTORM_STATUS_BLOCK_DATA_STATE_SIZE (IRO[138].size)

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#define CSTORM_STATUS_BLOCK_DATA_TIMEOUT_OFFSET(sbId,hcIndex) (IRO[139].base + ((sbId) * IRO[139].m1) + ((hcIndex) * IRO[139].m2))

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#define CSTORM_STATUS_BLOCK_DATA_TIMEOUT_SIZE (IRO[139].size)

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#define CSTORM_STATUS_BLOCK_DATA_FLAGS_OFFSET(sbId,hcIndex) (IRO[140].base + ((sbId) * IRO[140].m1) + ((hcIndex) * IRO[140].m2))

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#define CSTORM_STATUS_BLOCK_DATA_FLAGS_SIZE (IRO[140].size)

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#define CSTORM_SYNC_BLOCK_OFFSET(sbId) (IRO[141].base + ((sbId) * IRO[141].m1))

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#define CSTORM_SYNC_BLOCK_SIZE (IRO[141].size)

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#define CSTORM_HC_SYNC_LINE_INDEX_E2_OFFSET(hcIndex,sbId) (IRO[142].base + (((hcIndex)>>2) * IRO[142].m1) + (((hcIndex)&3) * IRO[142].m2) + ((sbId) * IRO[142].m3))

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#define CSTORM_HC_SYNC_LINE_INDEX_E2_SIZE (IRO[142].size)

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#define CSTORM_HC_SYNC_LINE_INDEX_E1X_OFFSET(hcIndex,sbId) (IRO[143].base + ((hcIndex) * IRO[143].m1) + ((sbId) * IRO[143].m2))

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#define CSTORM_HC_SYNC_LINE_INDEX_E1X_SIZE (IRO[143].size)

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#define CSTORM_HC_SYNC_LINE_DHC_OFFSET(sbSyncLines,sbId) (IRO[144].base + ((sbSyncLines) * IRO[144].m1) + ((sbId) * IRO[144].m2))

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#define CSTORM_HC_SYNC_LINE_DHC_SIZE (IRO[144].size)

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#define CSTORM_SP_STATUS_BLOCK_OFFSET(pfId) (IRO[145].base + ((pfId) * IRO[145].m1))

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#define CSTORM_SP_STATUS_BLOCK_SIZE (IRO[145].size)

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#define CSTORM_SP_STATUS_BLOCK_DATA_OFFSET(pfId) (IRO[146].base + ((pfId) * IRO[146].m1))

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#define CSTORM_SP_STATUS_BLOCK_DATA_SIZE (IRO[146].size)

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#define CSTORM_SP_STATUS_BLOCK_DATA_STATE_OFFSET(pfId) (IRO[147].base + ((pfId) * IRO[147].m1))

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#define CSTORM_SP_STATUS_BLOCK_DATA_STATE_SIZE (IRO[147].size)

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#define CSTORM_SP_SYNC_BLOCK_OFFSET(pfId) (IRO[148].base + ((pfId) * IRO[148].m1))

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#define CSTORM_SP_SYNC_BLOCK_SIZE (IRO[148].size)

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#define CSTORM_SP_HC_SYNC_LINE_INDEX_OFFSET(hcSpIndex,pfId) (IRO[149].base + ((hcSpIndex) * IRO[149].m1) + ((pfId) * IRO[149].m2))

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#define CSTORM_SP_HC_SYNC_LINE_INDEX_SIZE (IRO[149].size)

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#define CSTORM_DYNAMIC_HC_CONFIG_OFFSET(pfId) (IRO[150].base + ((pfId) * IRO[150].m1))

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#define CSTORM_DYNAMIC_HC_CONFIG_SIZE (IRO[150].size)

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#define CSTORM_ASSERT_LIST_OFFSET(assertListEntry) (IRO[151].base + ((assertListEntry) * IRO[151].m1))

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#define CSTORM_ASSERT_LIST_SIZE (IRO[151].size)

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#define CSTORM_ASSERT_LIST_INDEX_OFFSET (IRO[152].base)

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#define CSTORM_ASSERT_LIST_INDEX_SIZE (IRO[152].size)

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#define CSTORM_FUNC_EN_OFFSET(funcId) (IRO[153].base + ((funcId) * IRO[153].m1))

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#define CSTORM_FUNC_EN_SIZE (IRO[153].size)

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#define CSTORM_VF_TO_PF_OFFSET(funcId) (IRO[154].base + ((funcId) * IRO[154].m1))

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#define CSTORM_VF_TO_PF_SIZE (IRO[154].size)

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#define CSTORM_RECORD_SLOW_PATH_OFFSET(funcId) (IRO[155].base + ((funcId) * IRO[155].m1))

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#define CSTORM_RECORD_SLOW_PATH_SIZE (IRO[155].size)

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#define CSTORM_BYTE_COUNTER_OFFSET(sbId,dhcIndex) (IRO[156].base + ((sbId) * IRO[156].m1) + ((dhcIndex) * IRO[156].m2))

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#define CSTORM_BYTE_COUNTER_SIZE (IRO[156].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

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#define CSTORM_EVENT_RING_DATA_OFFSET(pfId) (IRO[157].base + (((pfId)>>1) * IRO[157].m1) + (((pfId)&1) * IRO[157].m2))

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#define CSTORM_EVENT_RING_DATA_SIZE (IRO[157].size)

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#define CSTORM_EVENT_RING_PROD_OFFSET(pfId) (IRO[158].base + (((pfId)>>1) * IRO[158].m1) + (((pfId)&1) * IRO[158].m2))

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#define CSTORM_EVENT_RING_PROD_SIZE (IRO[158].size)

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#define CSTORM_VF_PF_CHANNEL_STATE_OFFSET(vfId) (IRO[159].base + ((vfId) * IRO[159].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

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#define CSTORM_VF_PF_CHANNEL_STATE_SIZE (IRO[159].size)

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#define CSTORM_VF_PF_CHANNEL_VALID_OFFSET(vfId) (IRO[160].base + ((vfId) * IRO[160].m1))

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#define CSTORM_VF_PF_CHANNEL_VALID_SIZE (IRO[160].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

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#define CSTORM_IGU_MODE_OFFSET (IRO[161].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

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#define CSTORM_IGU_MODE_SIZE (IRO[161].size)

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#define CSTORM_ERROR_HANDLER_STATISTICS_RAM_OFFSET (IRO[162].base)

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#define CSTORM_ERROR_HANDLER_STATISTICS_RAM_SIZE (IRO[162].size)

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#define CSTORM_FINAL_CLEANUP_COMPLETE_OFFSET(funcId) (IRO[163].base + ((funcId) * IRO[163].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

36

#define COMMON_SB_SIZE (IRO[0].base)

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#define CSTORM_FINAL_CLEANUP_COMPLETE_SIZE (IRO[163].size)

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#define CSTORM_QUEUE_ZONE_OFFSET(queueId) (IRO[164].base + ((queueId) * IRO[164].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

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#define CSTORM_QUEUE_ZONE_SIZE (IRO[164].size)

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#define CSTORM_VF_ZONE_OFFSET(vfId) (IRO[165].base + ((vfId) * IRO[165].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

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#define CSTORM_VF_ZONE_SIZE (IRO[165].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

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#define CSTORM_INBOUND_INTERRUPT_TEST_VF_INFO_SIZE_IN_BYTES (IRO[166].base)

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#define CSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_1_INDEX (IRO[167].base)

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#define CSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_2_INDEX (IRO[168].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

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#define COMMON_SB_DATA_SIZE (IRO[1].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

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#define CSTORM_INBOUND_INTERRUPT_TEST_AGG_INT_3_INDEX (IRO[169].base)

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#define CSTORM_KUKU_TEST_OPCODE_OFFSET (IRO[170].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

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#define CSTORM_KUKU_TEST_OPCODE_SIZE (IRO[170].size)

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#define CSTORM_KUKU_LOAD_CONTEXT_TEST_OFFSET (IRO[171].base)

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#define CSTORM_KUKU_LOAD_CONTEXT_TEST_SIZE (IRO[171].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

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#define CSTORM_KUKU_OP_GEN_VALUE (IRO[172].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

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#define CSTORM_IGU_TEST_PF_ID_OFFSET (IRO[173].base)

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#define CSTORM_IGU_TEST_PF_ID_SIZE (IRO[173].size)

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#define CSTORM_IGU_TEST_VF_ID_OFFSET (IRO[174].base)

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#define CSTORM_IGU_TEST_VF_ID_SIZE (IRO[174].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

38

#define COMMON_SP_SB_SIZE (IRO[2].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

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#define CSTORM_IGU_TEST_VF_VALID_OFFSET (IRO[175].base)

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#define CSTORM_IGU_TEST_VF_VALID_SIZE (IRO[175].size)

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382

#define CSTORM_IGU_TEST_ADDRESS_OFFSET (IRO[176].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

383

#define CSTORM_IGU_TEST_ADDRESS_SIZE (IRO[176].size)

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384

#define CSTORM_IGU_TEST_IGU_COMMAND_OFFSET (IRO[177].base)

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385

#define CSTORM_IGU_TEST_IGU_COMMAND_SIZE (IRO[177].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

386

#define USTORM_INDIRECTION_TABLE_OFFSET(portId) (IRO[178].base + ((portId) * IRO[178].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

387

#define USTORM_INDIRECTION_TABLE_SIZE (IRO[178].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

388

#define USTORM_INDIRECTION_TABLE_ENTRY_SIZE (IRO[179].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

39

#define COMMON_SP_SB_DATA_SIZE (IRO[3].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

390

#define USTORM_ASSERT_LIST_OFFSET(assertListEntry) (IRO[180].base + ((assertListEntry) * IRO[180].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

391

#define USTORM_ASSERT_LIST_SIZE (IRO[180].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

393

#define USTORM_ASSERT_LIST_INDEX_OFFSET (IRO[181].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

394

#define USTORM_ASSERT_LIST_INDEX_SIZE (IRO[181].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

396

#define USTORM_FUNC_EN_OFFSET(funcId) (IRO[182].base + ((funcId) * IRO[182].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

397

#define USTORM_FUNC_EN_SIZE (IRO[182].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

399

#define USTORM_VF_TO_PF_OFFSET(funcId) (IRO[183].base + ((funcId) * IRO[183].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

40

#define COMMON_DYNAMIC_HC_CONFIG_SIZE (IRO[4].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

400

#define USTORM_VF_TO_PF_SIZE (IRO[183].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

402

#define USTORM_RECORD_SLOW_PATH_OFFSET(funcId) (IRO[184].base + ((funcId) * IRO[184].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

403

#define USTORM_RECORD_SLOW_PATH_SIZE (IRO[184].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

405

#define USTORM_PER_QUEUE_STATS_OFFSET(uStatQueueId) (IRO[185].base + ((uStatQueueId) * IRO[185].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

406

#define USTORM_PER_QUEUE_STATS_SIZE (IRO[185].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

408

#define USTORM_MEM_WORKAROUND_ADDRESS_OFFSET(pfId) (IRO[186].base + ((pfId) * IRO[186].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

409

#define USTORM_MEM_WORKAROUND_ADDRESS_SIZE (IRO[186].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

41

#define COMMON_ASM_ASSERT_MSG_SIZE (IRO[5].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

411

#define USTORM_ETH_PAUSE_ENABLED_OFFSET(portId) (IRO[187].base + ((portId) * IRO[187].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

412

#define USTORM_ETH_PAUSE_ENABLED_SIZE (IRO[187].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

414

#define USTORM_TOE_PAUSE_ENABLED_OFFSET(portId) (IRO[188].base + ((portId) * IRO[188].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

415

#define USTORM_TOE_PAUSE_ENABLED_SIZE (IRO[188].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

417

#define USTORM_MAX_PAUSE_TIME_USEC_OFFSET(portId) (IRO[189].base + ((portId) * IRO[189].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

418

#define USTORM_MAX_PAUSE_TIME_USEC_SIZE (IRO[189].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

42

#define COMMON_ASM_ASSERT_INDEX_SIZE (IRO[6].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

420

#define USTORM_ERROR_HANDLER_STATISTICS_RAM_OFFSET (IRO[190].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

421

#define USTORM_ERROR_HANDLER_STATISTICS_RAM_SIZE (IRO[190].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

423

#define USTORM_QUEUE_ZONE_OFFSET(queueId) (IRO[191].base + ((queueId) * IRO[191].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

424

#define USTORM_QUEUE_ZONE_SIZE (IRO[191].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

426

#define USTORM_VF_ZONE_OFFSET(vfId) (IRO[192].base + ((vfId) * IRO[192].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

427

#define USTORM_VF_ZONE_SIZE (IRO[192].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

428

#define USTORM_INBOUND_INTERRUPT_TEST_VF_INFO_SIZE_IN_BYTES (IRO[193].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

429

#define USTORM_INBOUND_INTERRUPT_TEST_AGG_INT_1_INDEX (IRO[194].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

43

#define COMMON_ASM_INVALID_ASSERT_OPCODE (IRO[7].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

430

#define USTORM_INBOUND_INTERRUPT_TEST_AGG_INT_2_INDEX (IRO[195].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

431

#define USTORM_INBOUND_INTERRUPT_TEST_AGG_INT_3_INDEX (IRO[196].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

432

#define USTORM_KUKU_TEST_OPCODE_OFFSET (IRO[197].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

433

#define USTORM_KUKU_TEST_OPCODE_SIZE (IRO[197].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

434

#define USTORM_KUKU_LOAD_CONTEXT_TEST_OFFSET (IRO[198].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

435

#define USTORM_KUKU_LOAD_CONTEXT_TEST_SIZE (IRO[198].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

436

#define USTORM_KUKU_OP_GEN_VALUE (IRO[199].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

437

#define USTORM_PCI_READ_TEST_ADDRESS_LO_OFFSET (IRO[200].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

438

#define USTORM_PCI_READ_TEST_ADDRESS_LO_SIZE (IRO[200].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

439

#define USTORM_PCI_READ_TEST_ADDRESS_HI_OFFSET (IRO[201].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

44

#define COMMON_RAM1_TEST_EVENT_ID (IRO[8].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

440

#define USTORM_PCI_READ_TEST_ADDRESS_HI_SIZE (IRO[201].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

441

#define USTORM_PCI_READ_TEST_RAM_ADDRESS_OFFSET (IRO[202].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

442

#define USTORM_PCI_READ_TEST_RAM_ADDRESS_SIZE (IRO[202].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

443

#define USTORM_PCI_READ_TEST_PCI_ENTITY_OFFSET (IRO[203].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

444

#define USTORM_PCI_READ_TEST_PCI_ENTITY_SIZE (IRO[203].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

445

#define USTORM_KUKU_NIG_PAUSE_TEST_MASK_OFFSET (IRO[204].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

446

#define USTORM_KUKU_NIG_PAUSE_TEST_MASK_SIZE (IRO[204].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

448

#define TSTORM_FUNCTION_COMMON_CONFIG_OFFSET(pfId) (IRO[205].base + ((pfId) * IRO[205].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

449

#define TSTORM_FUNCTION_COMMON_CONFIG_SIZE (IRO[205].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

45

#define COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_EVENT_ID (IRO[9].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

451

#define TSTORM_MAC_FILTER_CONFIG_OFFSET(pfId) (IRO[206].base + ((pfId) * IRO[206].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

452

#define TSTORM_MAC_FILTER_CONFIG_SIZE (IRO[206].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

454

#define TSTORM_APPROXIMATE_MATCH_MULTICAST_FILTERING_OFFSET(pfId) (IRO[207].base + ((pfId) * IRO[207].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

455

#define TSTORM_APPROXIMATE_MATCH_MULTICAST_FILTERING_SIZE (IRO[207].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

457

#define TSTORM_ACCEPT_CLASSIFY_FAILED_OFFSET (IRO[208].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

458

#define TSTORM_ACCEPT_CLASSIFY_FAILED_SIZE (IRO[208].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

46

#define COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_1_OFFSET (IRO[10].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

460

#define TSTORM_ACCEPT_CLASSIFY_FAIL_E2_ENABLE_OFFSET(portId) (IRO[209].base + ((portId) * IRO[209].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

461

#define TSTORM_ACCEPT_CLASSIFY_FAIL_E2_ENABLE_SIZE (IRO[209].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

463

#define TSTORM_ACCEPT_CLASSIFY_FAIL_E2_VNIC_OFFSET(portId) (IRO[210].base + ((portId) * IRO[210].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

464

#define TSTORM_ACCEPT_CLASSIFY_FAIL_E2_VNIC_SIZE (IRO[210].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

465

#define USTORM_CQE_PAGE_NEXT_OFFSET(portId,clientId) (IRO[211].base + ((portId) * IRO[211].m1) + ((clientId) * IRO[211].m2))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

466

#define USTORM_CQE_PAGE_NEXT_SIZE (IRO[211].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

468

#define USTORM_AGG_DATA_OFFSET (IRO[212].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

469

#define USTORM_AGG_DATA_SIZE (IRO[212].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

47

#define COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_2_OFFSET (IRO[11].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

471

#define USTORM_TPA_BTR_OFFSET (IRO[213].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

472

#define USTORM_TPA_BTR_SIZE (IRO[213].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

474

#define USTORM_ETH_DYNAMIC_HC_PARAM_OFFSET (IRO[214].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

475

#define USTORM_ETH_DYNAMIC_HC_PARAM_SIZE (IRO[214].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

477

#define USTORM_RX_PRODS_E1X_OFFSET(portId,clientId) (IRO[215].base + ((portId) * IRO[215].m1) + ((clientId) * IRO[215].m2))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

478

#define USTORM_RX_PRODS_E1X_SIZE (IRO[215].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

48

#define COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_3_OFFSET (IRO[12].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

480

#define USTORM_RX_PRODS_E2_OFFSET(qzoneId) (IRO[216].base + ((qzoneId) * IRO[216].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

481

#define USTORM_RX_PRODS_E2_SIZE (IRO[216].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

482

#define XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_ENABLED_OFFSET(portId) (IRO[217].base + ((portId) * IRO[217].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

483

#define XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_ENABLED_SIZE (IRO[217].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

484

#define XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_MAX_COUNT_OFFSET(portId) (IRO[218].base + ((portId) * IRO[218].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

485

#define XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_MAX_COUNT_SIZE (IRO[218].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

486

#define XSTORM_TCP_IPID_OFFSET(pfId) (IRO[219].base + (((pfId)>>1) * IRO[219].m1) + (((pfId)&1) * IRO[219].m2))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

487

#define XSTORM_TCP_IPID_SIZE (IRO[219].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

488

#define XSTORM_TCP_TX_SWS_TIMER_VAL_OFFSET(pfId) (IRO[220].base + (((pfId)>>1) * IRO[220].m1) + (((pfId)&1) * IRO[220].m2))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

489

#define XSTORM_TCP_TX_SWS_TIMER_VAL_SIZE (IRO[220].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

49

#define COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_1_RESULT_OFFSET (IRO[13].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

490

#define XSTORM_TCP_TX_SWITCHING_EN_OFFSET(portId) (IRO[221].base + ((portId) * IRO[221].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

491

#define XSTORM_TCP_TX_SWITCHING_EN_SIZE (IRO[221].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

492

#define TSTORM_TCP_DUPLICATE_ACK_THRESHOLD_OFFSET(pfId) (IRO[222].base + ((pfId) * IRO[222].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

493

#define TSTORM_TCP_DUPLICATE_ACK_THRESHOLD_SIZE (IRO[222].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

494

#define TSTORM_TCP_MAX_CWND_OFFSET(pfId) (IRO[223].base + ((pfId) * IRO[223].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

495

#define TSTORM_TCP_MAX_CWND_SIZE (IRO[223].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

496

#define TSTORM_TCP_GLOBAL_PARAMS_OFFSET (IRO[224].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

497

#define TSTORM_TCP_GLOBAL_PARAMS_SIZE (IRO[224].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

498

#define TSTORM_TCP_ISLES_ARRAY_DESCRIPTOR_OFFSET (IRO[225].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

499

#define TSTORM_TCP_ISLES_ARRAY_DESCRIPTOR_SIZE (IRO[225].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

50

#define COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_2_RESULT_OFFSET (IRO[14].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

500

#define TSTORM_TCP_ISLES_ARRAY_OFFSET (IRO[226].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

501

#define TSTORM_TCP_ISLES_ARRAY_SIZE (IRO[226].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

502

#define XSTORM_TOE_LLC_SNAP_ENABLED_OFFSET(pfId) (IRO[227].base + (((pfId)>>1) * IRO[227].m1) + (((pfId)&1) * IRO[227].m2))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

503

#define XSTORM_TOE_LLC_SNAP_ENABLED_SIZE (IRO[227].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

504

#define XSTORM_OUT_OCTETS_OFFSET (IRO[228].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

505

#define XSTORM_OUT_OCTETS_SIZE (IRO[228].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

506

#define TSTORM_TOE_MAX_SEG_RETRANSMIT_OFFSET(pfId) (IRO[229].base + ((pfId) * IRO[229].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

507

#define TSTORM_TOE_MAX_SEG_RETRANSMIT_SIZE (IRO[229].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

508

#define TSTORM_TOE_DOUBT_REACHABILITY_OFFSET(pfId) (IRO[230].base + ((pfId) * IRO[230].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

509

#define TSTORM_TOE_DOUBT_REACHABILITY_SIZE (IRO[230].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

51

#define COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_3_RESULT_OFFSET (IRO[15].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

510

#define TSTORM_TOE_MAX_DOMINANCE_VALUE_OFFSET (IRO[231].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

511

#define TSTORM_TOE_MAX_DOMINANCE_VALUE_SIZE (IRO[231].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

512

#define TSTORM_TOE_DOMINANCE_THRESHOLD_OFFSET (IRO[232].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

513

#define TSTORM_TOE_DOMINANCE_THRESHOLD_SIZE (IRO[232].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

514

#define CSTORM_TOE_CQ_CONS_PTR_LO_OFFSET(rssId,portId) (IRO[233].base + ((rssId) * IRO[233].m1) + ((portId) * IRO[233].m2))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

515

#define CSTORM_TOE_CQ_CONS_PTR_LO_SIZE (IRO[233].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

516

#define CSTORM_TOE_CQ_CONS_PTR_HI_OFFSET(rssId,portId) (IRO[234].base + ((rssId) * IRO[234].m1) + ((portId) * IRO[234].m2))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

517

#define CSTORM_TOE_CQ_CONS_PTR_HI_SIZE (IRO[234].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

518

#define CSTORM_TOE_CQ_PROD_OFFSET(rssId,portId) (IRO[235].base + ((rssId) * IRO[235].m1) + ((portId) * IRO[235].m2))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

519

#define CSTORM_TOE_CQ_PROD_SIZE (IRO[235].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

52

#define COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_1_MASK (IRO[16].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

520

#define CSTORM_TOE_CQ_CONS_OFFSET(rssId,portId) (IRO[236].base + ((rssId) * IRO[236].m1) + ((portId) * IRO[236].m2))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

521

#define CSTORM_TOE_CQ_CONS_SIZE (IRO[236].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

522

#define CSTORM_TOE_CQ_NXT_PAGE_ADDR_VALID_OFFSET(rssId,portId) (IRO[237].base + ((rssId) * IRO[237].m1) + ((portId) * IRO[237].m2))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

523

#define CSTORM_TOE_CQ_NXT_PAGE_ADDR_VALID_SIZE (IRO[237].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

524

#define CSTORM_TOE_STATUS_BLOCK_ID_OFFSET(rssId,portId) (IRO[238].base + ((rssId) * IRO[238].m1) + ((portId) * IRO[238].m2))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

525

#define CSTORM_TOE_STATUS_BLOCK_ID_SIZE (IRO[238].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

526

#define CSTORM_TOE_STATUS_BLOCK_INDEX_OFFSET(rssId,portId) (IRO[239].base + ((rssId) * IRO[239].m1) + ((portId) * IRO[239].m2))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

527

#define CSTORM_TOE_STATUS_BLOCK_INDEX_SIZE (IRO[239].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

528

#define CSTORM_TOE_CQ_NEXT_PAGE_BASE_ADDR_LO_OFFSET(rssId,portId) (IRO[240].base + ((rssId) * IRO[240].m1) + ((portId) * IRO[240].m2))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

529

#define CSTORM_TOE_CQ_NEXT_PAGE_BASE_ADDR_LO_SIZE (IRO[240].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

53

#define COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_2_MASK (IRO[17].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

530

#define CSTORM_TOE_CQ_NEXT_PAGE_BASE_ADDR_HI_OFFSET(rssId,portId) (IRO[241].base + ((rssId) * IRO[241].m1) + ((portId) * IRO[241].m2))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

531

#define CSTORM_TOE_CQ_NEXT_PAGE_BASE_ADDR_HI_SIZE (IRO[241].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

532

#define CSTORM_TOE_DYNAMIC_HC_PROD_OFFSET(rssId,portId) (IRO[242].base + ((rssId) * IRO[242].m1) + ((portId) * IRO[242].m2))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

533

#define CSTORM_TOE_DYNAMIC_HC_PROD_SIZE (IRO[242].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

534

#define CSTORM_TOE_DYNAMIC_HC_CONS_OFFSET(rssId,portId) (IRO[243].base + ((rssId) * IRO[243].m1) + ((portId) * IRO[243].m2))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

535

#define CSTORM_TOE_DYNAMIC_HC_CONS_SIZE (IRO[243].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

536

#define USTORM_GRQ_CACHE_BD_LO_OFFSET(rssId,portId,grqBdId) (IRO[244].base + ((rssId) * IRO[244].m1) + ((portId) * IRO[244].m2) + ((grqBdId) * IRO[244].m3))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

537

#define USTORM_GRQ_CACHE_BD_LO_SIZE (IRO[244].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

538

#define USTORM_GRQ_CACHE_BD_HI_OFFSET(rssId,portId,grqBdId) (IRO[245].base + ((rssId) * IRO[245].m1) + ((portId) * IRO[245].m2) + ((grqBdId) * IRO[245].m3))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

539

#define USTORM_GRQ_CACHE_BD_HI_SIZE (IRO[245].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

54

#define COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_3_MASK (IRO[18].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

540

#define USTORM_TOE_GRQ_CACHE_NUM_BDS (IRO[246].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

541

#define USTORM_TOE_GRQ_LOCAL_PROD_OFFSET(rssId,portId) (IRO[247].base + ((rssId) * IRO[247].m1) + ((portId) * IRO[247].m2))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

542

#define USTORM_TOE_GRQ_LOCAL_PROD_SIZE (IRO[247].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

543

#define USTORM_TOE_GRQ_LOCAL_CONS_OFFSET(rssId,portId) (IRO[248].base + ((rssId) * IRO[248].m1) + ((portId) * IRO[248].m2))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

544

#define USTORM_TOE_GRQ_LOCAL_CONS_SIZE (IRO[248].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

545

#define USTORM_TOE_GRQ_CONS_OFFSET(rssId,portId) (IRO[249].base + ((rssId) * IRO[249].m1) + ((portId) * IRO[249].m2))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

546

#define USTORM_TOE_GRQ_CONS_SIZE (IRO[249].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

547

#define USTORM_TOE_GRQ_PROD_OFFSET(rssId,portId) (IRO[250].base + ((rssId) * IRO[250].m1) + ((portId) * IRO[250].m2))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

548

#define USTORM_TOE_GRQ_PROD_SIZE (IRO[250].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

549

#define USTORM_TOE_GRQ_CONS_PTR_LO_OFFSET(rssId,portId) (IRO[251].base + ((rssId) * IRO[251].m1) + ((portId) * IRO[251].m2))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

55

#define COMMON_KUKU_TEST_AGG_INT (IRO[19].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

550

#define USTORM_TOE_GRQ_CONS_PTR_LO_SIZE (IRO[251].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

551

#define USTORM_TOE_GRQ_CONS_PTR_HI_OFFSET(rssId,portId) (IRO[252].base + ((rssId) * IRO[252].m1) + ((portId) * IRO[252].m2))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

552

#define USTORM_TOE_GRQ_CONS_PTR_HI_SIZE (IRO[252].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

553

#define USTORM_TOE_GRQ_BUF_SIZE_OFFSET(rssId,portId) (IRO[253].base + ((rssId) * IRO[253].m1) + ((portId) * IRO[253].m2))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

554

#define USTORM_TOE_GRQ_BUF_SIZE_SIZE (IRO[253].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

555

#define USTORM_TOE_CQ_NXT_PAGE_ADDR_VALID_OFFSET(rssId,portId) (IRO[254].base + ((rssId) * IRO[254].m1) + ((portId) * IRO[254].m2))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

556

#define USTORM_TOE_CQ_NXT_PAGE_ADDR_VALID_SIZE (IRO[254].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

557

#define USTORM_TOE_CQ_CONS_OFFSET(rssId,portId) (IRO[255].base + ((rssId) * IRO[255].m1) + ((portId) * IRO[255].m2))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

558

#define USTORM_TOE_CQ_CONS_SIZE (IRO[255].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

559

#define USTORM_TOE_CQ_PROD_OFFSET(rssId,portId) (IRO[256].base + ((rssId) * IRO[256].m1) + ((portId) * IRO[256].m2))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

56

#define COMMON_KUKU_TEST_EVENTID (IRO[20].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

560

#define USTORM_TOE_CQ_PROD_SIZE (IRO[256].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

561

#define USTORM_TOE_CQ_NEXT_PAGE_BASE_ADDR_LO_OFFSET(rssId,portId) (IRO[257].base + ((rssId) * IRO[257].m1) + ((portId) * IRO[257].m2))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

562

#define USTORM_TOE_CQ_NEXT_PAGE_BASE_ADDR_LO_SIZE (IRO[257].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

563

#define USTORM_TOE_CQ_NEXT_PAGE_BASE_ADDR_HI_OFFSET(rssId,portId) (IRO[258].base + ((rssId) * IRO[258].m1) + ((portId) * IRO[258].m2))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

564

#define USTORM_TOE_CQ_NEXT_PAGE_BASE_ADDR_HI_SIZE (IRO[258].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

565

#define USTORM_TOE_CQ_CONS_PTR_LO_OFFSET(rssId,portId) (IRO[259].base + ((rssId) * IRO[259].m1) + ((portId) * IRO[259].m2))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

566

#define USTORM_TOE_CQ_CONS_PTR_LO_SIZE (IRO[259].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

567

#define USTORM_TOE_CQ_CONS_PTR_HI_OFFSET(rssId,portId) (IRO[260].base + ((rssId) * IRO[260].m1) + ((portId) * IRO[260].m2))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

568

#define USTORM_TOE_CQ_CONS_PTR_HI_SIZE (IRO[260].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

569

#define USTORM_TOE_STATUS_BLOCK_ID_OFFSET(rssId,portId) (IRO[261].base + ((rssId) * IRO[261].m1) + ((portId) * IRO[261].m2))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

57

#define COMMON_KUKU_PCI_READ_OPCODE (IRO[21].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

570

#define USTORM_TOE_STATUS_BLOCK_ID_SIZE (IRO[261].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

571

#define USTORM_TOE_STATUS_BLOCK_INDEX_OFFSET(rssId,portId) (IRO[262].base + ((rssId) * IRO[262].m1) + ((portId) * IRO[262].m2))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

572

#define USTORM_TOE_STATUS_BLOCK_INDEX_SIZE (IRO[262].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

573

#define USTORM_TOE_TCP_PUSH_TIMER_TICKS_OFFSET(pfId) (IRO[263].base + ((pfId) * IRO[263].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

574

#define USTORM_TOE_TCP_PUSH_TIMER_TICKS_SIZE (IRO[263].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

575

#define USTORM_TOE_GRQ_XOFF_COUNTER_OFFSET(pfId) (IRO[264].base + ((pfId) * IRO[264].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

576

#define USTORM_TOE_GRQ_XOFF_COUNTER_SIZE (IRO[264].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

577

#define USTORM_TOE_RCQ_XOFF_COUNTER_OFFSET(pfId) (IRO[265].base + ((pfId) * IRO[265].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

578

#define USTORM_TOE_RCQ_XOFF_COUNTER_SIZE (IRO[265].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

579

#define USTORM_TOE_CQ_THR_LOW_OFFSET (IRO[266].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

58

#define COMMON_KUKU_LOAD_CONTEXT_OPCODE (IRO[22].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

580

#define USTORM_TOE_CQ_THR_LOW_SIZE (IRO[266].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

581

#define USTORM_TOE_GRQ_THR_LOW_OFFSET (IRO[267].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

582

#define USTORM_TOE_GRQ_THR_LOW_SIZE (IRO[267].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

583

#define USTORM_TOE_CQ_THR_HIGH_OFFSET (IRO[268].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

584

#define USTORM_TOE_CQ_THR_HIGH_SIZE (IRO[268].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

585

#define USTORM_TOE_GRQ_THR_HIGH_OFFSET (IRO[269].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

586

#define USTORM_TOE_GRQ_THR_HIGH_SIZE (IRO[269].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

587

#define TSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(pfId) (IRO[270].base + ((pfId) * IRO[270].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

588

#define TSTORM_ISCSI_TCP_VARS_FLAGS_SIZE (IRO[270].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

589

#define TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_OFFSET(pfId) (IRO[271].base + ((pfId) * IRO[271].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

59

#define COMMON_KUKU_LOAD_CONTEXT_INCVAL (IRO[23].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

590

#define TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_SIZE (IRO[271].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

591

#define TSTORM_ISCSI_TCP_VARS_MID_LOCAL_MAC_ADDR_OFFSET(pfId) (IRO[272].base + ((pfId) * IRO[272].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

592

#define TSTORM_ISCSI_TCP_VARS_MID_LOCAL_MAC_ADDR_SIZE (IRO[272].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

593

#define TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(pfId) (IRO[273].base + ((pfId) * IRO[273].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

594

#define TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_SIZE (IRO[273].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

595

#define TSTORM_ISCSI_RQ_SIZE_OFFSET(pfId) (IRO[274].base + ((pfId) * IRO[274].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

596

#define TSTORM_ISCSI_RQ_SIZE_SIZE (IRO[274].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

597

#define TSTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) (IRO[275].base + ((pfId) * IRO[275].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

598

#define TSTORM_ISCSI_PAGE_SIZE_SIZE (IRO[275].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

599

#define TSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) (IRO[276].base + ((pfId) * IRO[276].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

60

#define COMMON_KUKU_LOAD_CONTEXT_REGION (IRO[24].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

600

#define TSTORM_ISCSI_PAGE_SIZE_LOG_SIZE (IRO[276].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

601

#define TSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) (IRO[277].base + ((pfId) * IRO[277].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

602

#define TSTORM_ISCSI_NUM_OF_TASKS_SIZE (IRO[277].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

603

#define TSTORM_ISCSI_ERROR_BITMAP_OFFSET(pfId) (IRO[278].base + ((pfId) * IRO[278].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

604

#define TSTORM_ISCSI_ERROR_BITMAP_SIZE (IRO[278].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

605

#define TSTORM_ISCSI_L2_ISCSI_OOO_CID_TABLE_OFFSET(pfId) (IRO[279].base + ((pfId) * IRO[279].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

606

#define TSTORM_ISCSI_L2_ISCSI_OOO_CID_TABLE_SIZE (IRO[279].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

607

#define TSTORM_ISCSI_L2_ISCSI_OOO_CLIENT_ID_TABLE_OFFSET(pfId) (IRO[280].base + ((pfId) * IRO[280].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

608

#define TSTORM_ISCSI_L2_ISCSI_OOO_CLIENT_ID_TABLE_SIZE (IRO[280].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

609

#define TSTORM_ISCSI_L2_ISCSI_OOO_PROD_OFFSET(pfId) (IRO[281].base + ((pfId) * IRO[281].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

61

#define COMMON_KUKU_LOAD_CONTEXT_CID (IRO[25].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

610

#define TSTORM_ISCSI_L2_ISCSI_OOO_PROD_SIZE (IRO[281].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

611

#define TSTORM_ISCSI_L2_ISCSI_OOO_RX_BDS_THRSHLD_OFFSET(pfId) (IRO[282].base + ((pfId) * IRO[282].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

612

#define TSTORM_ISCSI_L2_ISCSI_OOO_RX_BDS_THRSHLD_SIZE (IRO[282].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

613

#define TSTORM_ISCSI_L2_ISCSI_OOO_CONS_OFFSET(pfId) (IRO[283].base + ((pfId) * IRO[283].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

614

#define TSTORM_ISCSI_L2_ISCSI_OOO_CONS_SIZE (IRO[283].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

615

#define TSTORM_ISCSI_TCP_LOCAL_ADV_WND_OFFSET(pfId) (IRO[284].base + ((pfId) * IRO[284].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

616

#define TSTORM_ISCSI_TCP_LOCAL_ADV_WND_SIZE (IRO[284].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

617

#define USTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) (IRO[285].base + ((pfId) * IRO[285].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

618

#define USTORM_ISCSI_PAGE_SIZE_SIZE (IRO[285].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

619

#define USTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) (IRO[286].base + ((pfId) * IRO[286].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

62

#define COMMON_KUKU_LOAD_CONTEXT_RUN_PBF_ECHO_TEST (IRO[26].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

620

#define USTORM_ISCSI_PAGE_SIZE_LOG_SIZE (IRO[286].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

621

#define USTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) (IRO[287].base + ((pfId) * IRO[287].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

622

#define USTORM_ISCSI_NUM_OF_TASKS_SIZE (IRO[287].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

623

#define USTORM_ISCSI_R2TQ_SIZE_OFFSET(pfId) (IRO[288].base + ((pfId) * IRO[288].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

624

#define USTORM_ISCSI_R2TQ_SIZE_SIZE (IRO[288].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

625

#define USTORM_ISCSI_CQ_SIZE_OFFSET(pfId) (IRO[289].base + ((pfId) * IRO[289].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

626

#define USTORM_ISCSI_CQ_SIZE_SIZE (IRO[289].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

627

#define USTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfId) (IRO[290].base + ((pfId) * IRO[290].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

628

#define USTORM_ISCSI_CQ_SQN_SIZE_SIZE (IRO[290].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

629

#define USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_OFFSET(pfId) (IRO[291].base + ((pfId) * IRO[291].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

63

#define COMMON_KUKU_QM_PAUSE_OPCODE (IRO[27].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

630

#define USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_SIZE (IRO[291].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

631

#define USTORM_ISCSI_RQ_BUFFER_SIZE_OFFSET(pfId) (IRO[292].base + ((pfId) * IRO[292].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

632

#define USTORM_ISCSI_RQ_BUFFER_SIZE_SIZE (IRO[292].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

633

#define USTORM_ISCSI_RQ_SIZE_OFFSET(pfId) (IRO[293].base + ((pfId) * IRO[293].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

634

#define USTORM_ISCSI_RQ_SIZE_SIZE (IRO[293].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

635

#define USTORM_ISCSI_ERROR_BITMAP_OFFSET(pfId) (IRO[294].base + ((pfId) * IRO[294].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

636

#define USTORM_ISCSI_ERROR_BITMAP_SIZE (IRO[294].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

637

#define XSTORM_ISCSI_TCP_VARS_TTL_OFFSET(pfId) (IRO[295].base + ((pfId) * IRO[295].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

638

#define XSTORM_ISCSI_TCP_VARS_TTL_SIZE (IRO[295].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

639

#define XSTORM_ISCSI_TCP_VARS_TOS_OFFSET(pfId) (IRO[296].base + ((pfId) * IRO[296].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

64

#define COMMON_KUKU_TEST_UNUSED_FOCS_SUCCESS_OPCODE_VALUE (IRO[28].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

640

#define XSTORM_ISCSI_TCP_VARS_TOS_SIZE (IRO[296].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

641

#define XSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(pfId) (IRO[297].base + ((pfId) * IRO[297].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

642

#define XSTORM_ISCSI_TCP_VARS_FLAGS_SIZE (IRO[297].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

643

#define XSTORM_ISCSI_TCP_VARS_ADV_WND_SCL_OFFSET(pfId) (IRO[298].base + ((pfId) * IRO[298].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

644

#define XSTORM_ISCSI_TCP_VARS_ADV_WND_SCL_SIZE (IRO[298].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

645

#define XSTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) (IRO[299].base + ((pfId) * IRO[299].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

646

#define XSTORM_ISCSI_PAGE_SIZE_SIZE (IRO[299].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

647

#define XSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) (IRO[300].base + ((pfId) * IRO[300].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

648

#define XSTORM_ISCSI_PAGE_SIZE_LOG_SIZE (IRO[300].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

649

#define XSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) (IRO[301].base + ((pfId) * IRO[301].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

65

#define COMMON_KUKU_TEST_UNUSED_FOCS_OPCODE_VALUE (IRO[29].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

650

#define XSTORM_ISCSI_NUM_OF_TASKS_SIZE (IRO[301].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

651

#define XSTORM_ISCSI_HQ_SIZE_OFFSET(pfId) (IRO[302].base + ((pfId) * IRO[302].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

652

#define XSTORM_ISCSI_HQ_SIZE_SIZE (IRO[302].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

653

#define XSTORM_ISCSI_SQ_SIZE_OFFSET(pfId) (IRO[303].base + ((pfId) * IRO[303].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

654

#define XSTORM_ISCSI_SQ_SIZE_SIZE (IRO[303].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

655

#define XSTORM_ISCSI_R2TQ_SIZE_OFFSET(pfId) (IRO[304].base + ((pfId) * IRO[304].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

656

#define XSTORM_ISCSI_R2TQ_SIZE_SIZE (IRO[304].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

657

#define XSTORM_ISCSI_LOCAL_MAC_ADDR0_OFFSET(pfId) (IRO[305].base + ((pfId) * IRO[305].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

658

#define XSTORM_ISCSI_LOCAL_MAC_ADDR0_SIZE (IRO[305].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

659

#define XSTORM_ISCSI_LOCAL_MAC_ADDR1_OFFSET(pfId) (IRO[306].base + ((pfId) * IRO[306].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

660

#define XSTORM_ISCSI_LOCAL_MAC_ADDR1_SIZE (IRO[306].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

661

#define XSTORM_ISCSI_LOCAL_MAC_ADDR2_OFFSET(pfId) (IRO[307].base + ((pfId) * IRO[307].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

662

#define XSTORM_ISCSI_LOCAL_MAC_ADDR2_SIZE (IRO[307].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

663

#define XSTORM_ISCSI_LOCAL_MAC_ADDR3_OFFSET(pfId) (IRO[308].base + ((pfId) * IRO[308].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

664

#define XSTORM_ISCSI_LOCAL_MAC_ADDR3_SIZE (IRO[308].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

665

#define XSTORM_ISCSI_LOCAL_MAC_ADDR4_OFFSET(pfId) (IRO[309].base + ((pfId) * IRO[309].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

666

#define XSTORM_ISCSI_LOCAL_MAC_ADDR4_SIZE (IRO[309].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

667

#define XSTORM_ISCSI_LOCAL_MAC_ADDR5_OFFSET(pfId) (IRO[310].base + ((pfId) * IRO[310].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

668

#define XSTORM_ISCSI_LOCAL_MAC_ADDR5_SIZE (IRO[310].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

669

#define XSTORM_ISCSI_LOCAL_VLAN_OFFSET(pfId) (IRO[311].base + ((pfId) * IRO[311].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

67

#define XSTORM_SPQ_PAGE_BASE_OFFSET(funcId) (IRO[30].base + ((funcId) * IRO[30].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

670

#define XSTORM_ISCSI_LOCAL_VLAN_SIZE (IRO[311].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

671

#define CSTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) (IRO[312].base + ((pfId) * IRO[312].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

672

#define CSTORM_ISCSI_PAGE_SIZE_SIZE (IRO[312].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

673

#define CSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) (IRO[313].base + ((pfId) * IRO[313].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

674

#define CSTORM_ISCSI_PAGE_SIZE_LOG_SIZE (IRO[313].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

675

#define CSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) (IRO[314].base + ((pfId) * IRO[314].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

676

#define CSTORM_ISCSI_NUM_OF_TASKS_SIZE (IRO[314].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

677

#define CSTORM_ISCSI_EQ_PROD_OFFSET(pfId,iscsiEqId) (IRO[315].base + ((pfId) * IRO[315].m1) + ((iscsiEqId) * IRO[315].m2))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

678

#define CSTORM_ISCSI_EQ_PROD_SIZE (IRO[315].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

679

#define CSTORM_ISCSI_EQ_CONS_OFFSET(pfId,iscsiEqId) (IRO[316].base + ((pfId) * IRO[316].m1) + ((iscsiEqId) * IRO[316].m2))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

68

#define XSTORM_SPQ_PAGE_BASE_SIZE (IRO[30].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

680

#define CSTORM_ISCSI_EQ_CONS_SIZE (IRO[316].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

681

#define CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET(pfId,iscsiEqId) (IRO[317].base + ((pfId) * IRO[317].m1) + ((iscsiEqId) * IRO[317].m2))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

682

#define CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_SIZE (IRO[317].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

683

#define CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET(pfId,iscsiEqId) (IRO[318].base + ((pfId) * IRO[318].m1) + ((iscsiEqId) * IRO[318].m2))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

684

#define CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_SIZE (IRO[318].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

685

#define CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_VALID_OFFSET(pfId,iscsiEqId) (IRO[319].base + ((pfId) * IRO[319].m1) + ((iscsiEqId) * IRO[319].m2))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

686

#define CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_VALID_SIZE (IRO[319].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

687

#define CSTORM_ISCSI_EQ_SB_NUM_OFFSET(pfId,iscsiEqId) (IRO[320].base + ((pfId) * IRO[320].m1) + ((iscsiEqId) * IRO[320].m2))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

688

#define CSTORM_ISCSI_EQ_SB_NUM_SIZE (IRO[320].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

689

#define CSTORM_ISCSI_EQ_SB_INDEX_OFFSET(pfId,iscsiEqId) (IRO[321].base + ((pfId) * IRO[321].m1) + ((iscsiEqId) * IRO[321].m2))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

690

#define CSTORM_ISCSI_EQ_SB_INDEX_SIZE (IRO[321].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

691

#define CSTORM_ISCSI_HQ_SIZE_OFFSET(pfId) (IRO[322].base + ((pfId) * IRO[322].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

692

#define CSTORM_ISCSI_HQ_SIZE_SIZE (IRO[322].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

693

#define CSTORM_ISCSI_CQ_SIZE_OFFSET(pfId) (IRO[323].base + ((pfId) * IRO[323].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

694

#define CSTORM_ISCSI_CQ_SIZE_SIZE (IRO[323].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

695

#define CSTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfId) (IRO[324].base + ((pfId) * IRO[324].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

696

#define CSTORM_ISCSI_CQ_SQN_SIZE_SIZE (IRO[324].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

697

#define USTORM_FCOE_EQ_PROD_OFFSET(pfId) (IRO[325].base + ((pfId) * IRO[325].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

698

#define USTORM_FCOE_EQ_PROD_SIZE (IRO[325].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

699

#define USTORM_FCOE_TIMER_PARAM_OFFSET (IRO[326].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

70

#define XSTORM_SPQ_PROD_OFFSET(funcId) (IRO[31].base + ((funcId) * IRO[31].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

700

#define USTORM_FCOE_TIMER_PARAM_SIZE (IRO[326].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

701

#define USTORM_TIMER_ARRAY_OFFSET (IRO[327].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

702

#define USTORM_TIMER_ARRAY_SIZE (IRO[327].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

703

#define USTORM_STAT_FC_CRC_CNT_OFFSET (IRO[328].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

704

#define USTORM_STAT_FC_CRC_CNT_SIZE (IRO[328].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

705

#define USTORM_STAT_EOFA_DEL_CNT_OFFSET (IRO[329].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

706

#define USTORM_STAT_EOFA_DEL_CNT_SIZE (IRO[329].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

707

#define USTORM_STAT_MISS_FRAME_CNT_OFFSET (IRO[330].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

708

#define USTORM_STAT_MISS_FRAME_CNT_SIZE (IRO[330].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

709

#define USTORM_STAT_SEQ_TIMEOUT_CNT_OFFSET (IRO[331].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

71

#define XSTORM_SPQ_PROD_SIZE (IRO[31].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

710

#define USTORM_STAT_SEQ_TIMEOUT_CNT_SIZE (IRO[331].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

711

#define USTORM_STAT_DROP_SEQ_CNT_OFFSET (IRO[332].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

712

#define USTORM_STAT_DROP_SEQ_CNT_SIZE (IRO[332].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

713

#define USTORM_STAT_FCOE_RX_DROP_PKT_CNT_OFFSET (IRO[333].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

714

#define USTORM_STAT_FCOE_RX_DROP_PKT_CNT_SIZE (IRO[333].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

715

#define USTORM_STAT_FCP_RX_PKT_CNT_OFFSET (IRO[334].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

716

#define USTORM_STAT_FCP_RX_PKT_CNT_SIZE (IRO[334].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

717

#define USTORM_STAT_OFFSET (IRO[335].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

718

#define USTORM_STAT_SIZE (IRO[335].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

719

#define USTORM_DEBUG_DROP_PKT_CNT_OFFSET (IRO[336].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

720

#define USTORM_DEBUG_DROP_PKT_CNT_SIZE (IRO[336].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

721

#define USTORM_DEBUG_OFFSET (IRO[337].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

722

#define USTORM_DEBUG_SIZE (IRO[337].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

723

#define USTORM_CACHED_TCE_MNG_INFO_DWORD_ONE_OFFSET(cached_tbl_size) (IRO[338].base + ((cached_tbl_size) * IRO[338].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

724

#define USTORM_CACHED_TCE_MNG_INFO_DWORD_ONE_SIZE (IRO[338].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

725

#define USTORM_CACHED_TCE_MNG_INFO_DWORD_TWO_OFFSET(cached_tbl_size) (IRO[339].base + ((cached_tbl_size) * IRO[339].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

726

#define USTORM_CACHED_TCE_MNG_INFO_DWORD_TWO_SIZE (IRO[339].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

727

#define USTORM_CACHED_TCE_ENTRY_TCE_OFFSET (IRO[340].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

728

#define USTORM_CACHED_TCE_ENTRY_TCE_SIZE (IRO[340].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

729

#define USTORM_CACHED_TCE_ENTRY_MNG_INFO_OFFSET (IRO[341].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

73

#define XSTORM_SPQ_DATA_OFFSET(funcId) (IRO[32].base + ((funcId) * IRO[32].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

730

#define USTORM_CACHED_TCE_ENTRY_MNG_INFO_SIZE (IRO[341].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

731

#define USTORM_FCOE_CACHED_TCE_TBL_BIT_MAP_OFFSET (IRO[342].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

732

#define USTORM_FCOE_CACHED_TCE_TBL_BIT_MAP_SIZE (IRO[342].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

733

#define USTORM_DEBUG_CACHED_TCE_WAIT_4_BD_READ_OFFSET (IRO[343].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

734

#define USTORM_DEBUG_CACHED_TCE_WAIT_4_BD_READ_SIZE (IRO[343].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

735

#define USTORM_DEBUG_CACHED_TCE_WAKE_ANOTHER_THREAD_DATA_OFFSET (IRO[344].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

736

#define USTORM_DEBUG_CACHED_TCE_WAKE_ANOTHER_THREAD_DATA_SIZE (IRO[344].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

737

#define USTORM_DEBUG_CACHED_TCE_WAKE_ANOTHER_THREAD_NON_DATA_OFFSET (IRO[345].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

738

#define USTORM_DEBUG_CACHED_TCE_WAKE_ANOTHER_THREAD_NON_DATA_SIZE (IRO[345].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

739

#define USTORM_DEBUG_CACHED_TCE_WAKE_ANOTHER_THREAD_ERR_OFFSET (IRO[346].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

74

#define XSTORM_SPQ_DATA_SIZE (IRO[32].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

740

#define USTORM_DEBUG_CACHED_TCE_WAKE_ANOTHER_THREAD_ERR_SIZE (IRO[346].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

741

#define USTORM_DEBUG_CACHED_TCE_GLOBAL_TIMER_TASK_IN_USE_OFFSET (IRO[347].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

742

#define USTORM_DEBUG_CACHED_TCE_GLOBAL_TIMER_TASK_IN_USE_SIZE (IRO[347].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

743

#define USTORM_DEBUG_CACHED_TCE_DEL_CACHED_TASK_OFFSET (IRO[348].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

744

#define USTORM_DEBUG_CACHED_TCE_DEL_CACHED_TASK_SIZE (IRO[348].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

745

#define USTORM_DEBUG_CACHED_TCE_SILENT_DROP_CACHED_TASK_OFFSET (IRO[349].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

746

#define USTORM_DEBUG_CACHED_TCE_SILENT_DROP_CACHED_TASK_SIZE (IRO[349].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

747

#define USTORM_DEBUG_CACHED_TCE_OFFSET (IRO[350].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

748

#define USTORM_DEBUG_CACHED_TCE_SIZE (IRO[350].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

749

#define USTORM_FCOE_DEBUG_CACHED_TCE_SEQ_CNT_ON_DROP_OFFSET (IRO[351].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

75

#define XSTORM_HIGIG_HDR_LENGTH_OFFSET(portId) (IRO[33].base + ((portId) * IRO[33].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

750

#define USTORM_FCOE_DEBUG_CACHED_TCE_SEQ_CNT_ON_DROP_SIZE (IRO[351].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

751

#define USTORM_FCOE_DEBUG_CACHED_TCE_SEQ_CNT_ON_CRC_ERROR_OFFSET (IRO[352].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

752

#define USTORM_FCOE_DEBUG_CACHED_TCE_SEQ_CNT_ON_CRC_ERROR_SIZE (IRO[352].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

753

#define USTORM_FCOE_DEBUG_CACHED_TCE_SEQ_CNT_ON_ERROR_OFFSET (IRO[353].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

754

#define USTORM_FCOE_DEBUG_CACHED_TCE_SEQ_CNT_ON_ERROR_SIZE (IRO[353].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

755

#define USTORM_FCOE_DEBUG_CACHED_TCE_PREVIOUS_THREAD_OFFSET (IRO[354].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

756

#define USTORM_FCOE_DEBUG_CACHED_TCE_PREVIOUS_THREAD_SIZE (IRO[354].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

757

#define USTORM_FCOE_DEBUG_CACHED_TCE_CRC_ERR_DETECT_DATA_IN_OFFSET (IRO[355].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

758

#define USTORM_FCOE_DEBUG_CACHED_TCE_CRC_ERR_DETECT_DATA_IN_SIZE (IRO[355].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

759

#define USTORM_FCOE_DEBUG_CACHED_TCE_CRC_ERR_DETECT_READ_TCE_OFFSET (IRO[356].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

76

#define XSTORM_HIGIG_HDR_LENGTH_SIZE (IRO[33].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

760

#define USTORM_FCOE_DEBUG_CACHED_TCE_CRC_ERR_DETECT_READ_TCE_SIZE (IRO[356].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

761

#define USTORM_FCOE_DEBUG_CACHED_TCE_CRC_ERR_DETECT_DROP_ERR_OFFSET (IRO[357].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

762

#define USTORM_FCOE_DEBUG_CACHED_TCE_CRC_ERR_DETECT_DROP_ERR_SIZE (IRO[357].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

763

#define USTORM_FCOE_DEBUG_PARAMS_ERRORS_NUMBER_OFFSET (IRO[358].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

764

#define USTORM_FCOE_DEBUG_PARAMS_ERRORS_NUMBER_SIZE (IRO[358].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

765

#define USTORM_FCOE_DEBUG_PARAMS_SILENT_DROP_NUMBER_OFFSET (IRO[359].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

766

#define USTORM_FCOE_DEBUG_PARAMS_SILENT_DROP_NUMBER_SIZE (IRO[359].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

767

#define USTORM_FCOE_DEBUG_PARAMS_SILENT_DROP_BITMAP_OFFSET (IRO[360].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

768

#define USTORM_FCOE_DEBUG_PARAMS_SILENT_DROP_BITMAP_SIZE (IRO[360].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

769

#define USTORM_FCOE_DEBUG_PARAMS_ENABLE_CONN_RACE_OFFSET (IRO[361].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

770

#define USTORM_FCOE_DEBUG_PARAMS_ENABLE_CONN_RACE_SIZE (IRO[361].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

771

#define USTORM_FCOE_DEBUG_PARAMS_TASK_IN_USE_OFFSET (IRO[362].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

772

#define USTORM_FCOE_DEBUG_PARAMS_TASK_IN_USE_SIZE (IRO[362].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

773

#define USTORM_FCOE_DEBUG_PARAMS_CRC_ERROR_TASK_IN_USE_OFFSET (IRO[363].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

774

#define USTORM_FCOE_DEBUG_PARAMS_CRC_ERROR_TASK_IN_USE_SIZE (IRO[363].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

775

#define XSTORM_FCOE_TIMER_PARAM_OFFSET (IRO[364].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

776

#define XSTORM_FCOE_TIMER_PARAM_SIZE (IRO[364].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

777

#define XSTORM_TIMER_ARRAY_OFFSET (IRO[365].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

778

#define XSTORM_TIMER_ARRAY_SIZE (IRO[365].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

779

#define XSTORM_STAT_FCOE_TX_PKT_CNT_OFFSET (IRO[366].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

78

#define XSTORM_VF_SPQ_PAGE_BASE_OFFSET(vfId) (IRO[34].base + ((vfId) * IRO[34].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

780

#define XSTORM_STAT_FCOE_TX_PKT_CNT_SIZE (IRO[366].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

781

#define XSTORM_STAT_FCOE_TX_BYTE_CNT_OFFSET (IRO[367].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

782

#define XSTORM_STAT_FCOE_TX_BYTE_CNT_SIZE (IRO[367].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

783

#define XSTORM_STAT_FCP_TX_PKT_CNT_OFFSET (IRO[368].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

784

#define XSTORM_STAT_FCP_TX_PKT_CNT_SIZE (IRO[368].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

785

#define XSTORM_STAT_OFFSET (IRO[369].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

786

#define XSTORM_STAT_SIZE (IRO[369].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

787

#define XSTORM_DEBUG_ABTS_BLOCK_SQ_CNT_OFFSET (IRO[370].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

788

#define XSTORM_DEBUG_ABTS_BLOCK_SQ_CNT_SIZE (IRO[370].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

789

#define XSTORM_DEBUG_CLEANUP_BLOCK_SQ_CNT_OFFSET (IRO[371].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

79

#define XSTORM_VF_SPQ_PAGE_BASE_SIZE (IRO[34].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

790

#define XSTORM_DEBUG_CLEANUP_BLOCK_SQ_CNT_SIZE (IRO[371].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

791

#define XSTORM_DEBUG_OFFSET (IRO[372].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

792

#define XSTORM_DEBUG_SIZE (IRO[372].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

793

#define TSTORM_STAT_FCOE_VER_CNT_OFFSET (IRO[373].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

794

#define TSTORM_STAT_FCOE_VER_CNT_SIZE (IRO[373].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

795

#define TSTORM_STAT_FCOE_RX_PKT_CNT_OFFSET (IRO[374].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

796

#define TSTORM_STAT_FCOE_RX_PKT_CNT_SIZE (IRO[374].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

797

#define TSTORM_STAT_FCOE_RX_BYTE_CNT_OFFSET (IRO[375].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

798

#define TSTORM_STAT_FCOE_RX_BYTE_CNT_SIZE (IRO[375].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

799

#define TSTORM_STAT_FCOE_RX_DROP_PKT_CNT_OFFSET (IRO[376].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

800

#define TSTORM_STAT_FCOE_RX_DROP_PKT_CNT_SIZE (IRO[376].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

801

#define TSTORM_STAT_OFFSET (IRO[377].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

802

#define TSTORM_STAT_SIZE (IRO[377].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

803

#define TSTORM_PORT_DEBUG_WAIT_FOR_YOUR_TURN_SP_CNT_OFFSET (IRO[378].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

804

#define TSTORM_PORT_DEBUG_WAIT_FOR_YOUR_TURN_SP_CNT_SIZE (IRO[378].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

805

#define TSTORM_PORT_DEBUG_AFEX_ERROR_PACKETS_OFFSET (IRO[379].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

806

#define TSTORM_PORT_DEBUG_AFEX_ERROR_PACKETS_SIZE (IRO[379].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

807

#define TSTORM_PORT_DEBUG_OFFSET (IRO[380].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

808

#define TSTORM_PORT_DEBUG_SIZE (IRO[380].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

809

#define TSTORM_REORDER_DATA_OFFSET (IRO[381].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

81

#define XSTORM_VF_SPQ_PROD_OFFSET(vfId) (IRO[35].base + ((vfId) * IRO[35].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

810

#define TSTORM_REORDER_DATA_SIZE (IRO[381].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

811

#define TSTORM_REORDER_WAITING_TABLE_OFFSET (IRO[382].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

812

#define TSTORM_REORDER_WAITING_TABLE_SIZE (IRO[382].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

813

#define TSTORM_WAITING_LIST_SIZE (IRO[383].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

814

#define TSTORM_REORDER_WAITING_ENTRY_OFFSET (IRO[384].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

815

#define TSTORM_REORDER_WAITING_ENTRY_SIZE (IRO[384].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

82

#define XSTORM_VF_SPQ_PROD_SIZE (IRO[35].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

84

#define XSTORM_VF_SPQ_DATA_OFFSET(vfId) (IRO[36].base + ((vfId) * IRO[36].m1))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

85

#define XSTORM_VF_SPQ_DATA_SIZE (IRO[36].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

86

#define XSTORM_JUMBO_SUPPORT_OFFSET(pfId) (IRO[37].base + (((pfId)>>1) * IRO[37].m1) + (((pfId)&1) * IRO[37].m2))

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

87

#define XSTORM_JUMBO_SUPPORT_SIZE (IRO[37].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

88

#define XSTORM_COMMON_IP_ID_MASK_OFFSET (IRO[38].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

89

#define XSTORM_COMMON_IP_ID_MASK_SIZE (IRO[38].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

91

#define XSTORM_COMMON_RTC_PARAMS_OFFSET (IRO[39].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

92

#define XSTORM_COMMON_RTC_PARAMS_SIZE (IRO[39].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

94

#define XSTORM_COMMON_RTC_RESOLUTION_OFFSET (IRO[40].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

95

#define XSTORM_COMMON_RTC_RESOLUTION_SIZE (IRO[40].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

97

#define XSTORM_FW_VERSION_OFFSET (IRO[41].base)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/577xx_int_offsets.h

98

#define XSTORM_FW_VERSION_SIZE (IRO[41].size)

usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/include/lm5710.h

2895

#define IRO (PFDEV(pdev))->ecore_info.iro_arr

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

100

#define MSTORM_ETH_VF_PRODS_OFFSET(vf_id,vf_queue_id) (IRO[20].base + ((vf_id) * IRO[20].m1) + ((vf_queue_id) * IRO[20].m2))

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

101

#define MSTORM_ETH_VF_PRODS_SIZE (IRO[20].size)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

103

#define MSTORM_TPA_TIMEOUT_US_OFFSET (IRO[21].base)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

104

#define MSTORM_TPA_TIMEOUT_US_SIZE (IRO[21].size)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

106

#define MSTORM_ETH_PF_STAT_OFFSET(pf_id) (IRO[22].base + ((pf_id) * IRO[22].m1))

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

107

#define MSTORM_ETH_PF_STAT_SIZE (IRO[22].size)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

109

#define USTORM_QUEUE_STAT_OFFSET(stat_counter_id) (IRO[23].base + ((stat_counter_id) * IRO[23].m1))

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

110

#define USTORM_QUEUE_STAT_SIZE (IRO[23].size)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

112

#define USTORM_ETH_PF_STAT_OFFSET(pf_id) (IRO[24].base + ((pf_id) * IRO[24].m1))

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

113

#define USTORM_ETH_PF_STAT_SIZE (IRO[24].size)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

115

#define PSTORM_QUEUE_STAT_OFFSET(stat_counter_id) (IRO[25].base + ((stat_counter_id) * IRO[25].m1))

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

116

#define PSTORM_QUEUE_STAT_SIZE (IRO[25].size)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

118

#define PSTORM_ETH_PF_STAT_OFFSET(pf_id) (IRO[26].base + ((pf_id) * IRO[26].m1))

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

119

#define PSTORM_ETH_PF_STAT_SIZE (IRO[26].size)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

121

#define PSTORM_CTL_FRAME_ETHTYPE_OFFSET(ethType_id) (IRO[27].base + ((ethType_id) * IRO[27].m1))

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

122

#define PSTORM_CTL_FRAME_ETHTYPE_SIZE (IRO[27].size)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

124

#define TSTORM_ETH_PRS_INPUT_OFFSET (IRO[28].base)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

125

#define TSTORM_ETH_PRS_INPUT_SIZE (IRO[28].size)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

127

#define ETH_RX_RATE_LIMIT_OFFSET(pf_id) (IRO[29].base + ((pf_id) * IRO[29].m1))

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

128

#define ETH_RX_RATE_LIMIT_SIZE (IRO[29].size)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

130

#define XSTORM_ETH_QUEUE_ZONE_OFFSET(queue_id) (IRO[30].base + ((queue_id) * IRO[30].m1))

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

131

#define XSTORM_ETH_QUEUE_ZONE_SIZE (IRO[30].size)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

133

#define YSTORM_TOE_CQ_PROD_OFFSET(rss_id) (IRO[31].base + ((rss_id) * IRO[31].m1))

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

134

#define YSTORM_TOE_CQ_PROD_SIZE (IRO[31].size)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

136

#define USTORM_TOE_CQ_PROD_OFFSET(rss_id) (IRO[32].base + ((rss_id) * IRO[32].m1))

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

137

#define USTORM_TOE_CQ_PROD_SIZE (IRO[32].size)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

139

#define USTORM_TOE_GRQ_PROD_OFFSET(pf_id) (IRO[33].base + ((pf_id) * IRO[33].m1))

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

140

#define USTORM_TOE_GRQ_PROD_SIZE (IRO[33].size)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

142

#define TSTORM_SCSI_CMDQ_CONS_OFFSET(cmdq_queue_id) (IRO[34].base + ((cmdq_queue_id) * IRO[34].m1))

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

143

#define TSTORM_SCSI_CMDQ_CONS_SIZE (IRO[34].size)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

145

#define TSTORM_SCSI_BDQ_EXT_PROD_OFFSET(func_id,bdq_id) (IRO[35].base + ((func_id) * IRO[35].m1) + ((bdq_id) * IRO[35].m2))

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

146

#define TSTORM_SCSI_BDQ_EXT_PROD_SIZE (IRO[35].size)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

148

#define MSTORM_SCSI_BDQ_EXT_PROD_OFFSET(func_id,bdq_id) (IRO[36].base + ((func_id) * IRO[36].m1) + ((bdq_id) * IRO[36].m2))

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

149

#define MSTORM_SCSI_BDQ_EXT_PROD_SIZE (IRO[36].size)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

151

#define TSTORM_ISCSI_RX_STATS_OFFSET(pf_id) (IRO[37].base + ((pf_id) * IRO[37].m1))

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

152

#define TSTORM_ISCSI_RX_STATS_SIZE (IRO[37].size)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

154

#define MSTORM_ISCSI_RX_STATS_OFFSET(pf_id) (IRO[38].base + ((pf_id) * IRO[38].m1))

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

155

#define MSTORM_ISCSI_RX_STATS_SIZE (IRO[38].size)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

157

#define USTORM_ISCSI_RX_STATS_OFFSET(pf_id) (IRO[39].base + ((pf_id) * IRO[39].m1))

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

158

#define USTORM_ISCSI_RX_STATS_SIZE (IRO[39].size)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

160

#define XSTORM_ISCSI_TX_STATS_OFFSET(pf_id) (IRO[40].base + ((pf_id) * IRO[40].m1))

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

161

#define XSTORM_ISCSI_TX_STATS_SIZE (IRO[40].size)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

163

#define YSTORM_ISCSI_TX_STATS_OFFSET(pf_id) (IRO[41].base + ((pf_id) * IRO[41].m1))

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

164

#define YSTORM_ISCSI_TX_STATS_SIZE (IRO[41].size)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

166

#define PSTORM_ISCSI_TX_STATS_OFFSET(pf_id) (IRO[42].base + ((pf_id) * IRO[42].m1))

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

167

#define PSTORM_ISCSI_TX_STATS_SIZE (IRO[42].size)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

169

#define TSTORM_FCOE_RX_STATS_OFFSET(pf_id) (IRO[43].base + ((pf_id) * IRO[43].m1))

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

170

#define TSTORM_FCOE_RX_STATS_SIZE (IRO[43].size)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

172

#define PSTORM_FCOE_TX_STATS_OFFSET(pf_id) (IRO[44].base + ((pf_id) * IRO[44].m1))

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

173

#define PSTORM_FCOE_TX_STATS_SIZE (IRO[44].size)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

175

#define PSTORM_RDMA_QUEUE_STAT_OFFSET(rdma_stat_counter_id) (IRO[45].base + ((rdma_stat_counter_id) * IRO[45].m1))

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

176

#define PSTORM_RDMA_QUEUE_STAT_SIZE (IRO[45].size)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

178

#define TSTORM_RDMA_QUEUE_STAT_OFFSET(rdma_stat_counter_id) (IRO[46].base + ((rdma_stat_counter_id) * IRO[46].m1))

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

179

#define TSTORM_RDMA_QUEUE_STAT_SIZE (IRO[46].size)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

181

#define XSTORM_IWARP_RXMIT_STATS_OFFSET(pf_id) (IRO[47].base + ((pf_id) * IRO[47].m1))

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

182

#define XSTORM_IWARP_RXMIT_STATS_SIZE (IRO[47].size)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

184

#define TSTORM_ROCE_EVENTS_STAT_OFFSET(roce_pf_id) (IRO[48].base + ((roce_pf_id) * IRO[48].m1))

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

185

#define TSTORM_ROCE_EVENTS_STAT_SIZE (IRO[48].size)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

40

#define YSTORM_FLOW_CONTROL_MODE_OFFSET (IRO[0].base)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

41

#define YSTORM_FLOW_CONTROL_MODE_SIZE (IRO[0].size)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

43

#define TSTORM_PORT_STAT_OFFSET(port_id) (IRO[1].base + ((port_id) * IRO[1].m1))

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

44

#define TSTORM_PORT_STAT_SIZE (IRO[1].size)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

46

#define TSTORM_LL2_PORT_STAT_OFFSET(port_id) (IRO[2].base + ((port_id) * IRO[2].m1))

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

47

#define TSTORM_LL2_PORT_STAT_SIZE (IRO[2].size)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

49

#define USTORM_VF_PF_CHANNEL_READY_OFFSET(vf_id) (IRO[3].base + ((vf_id) * IRO[3].m1))

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

50

#define USTORM_VF_PF_CHANNEL_READY_SIZE (IRO[3].size)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

52

#define USTORM_FLR_FINAL_ACK_OFFSET(pf_id) (IRO[4].base + ((pf_id) * IRO[4].m1))

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

53

#define USTORM_FLR_FINAL_ACK_SIZE (IRO[4].size)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

55

#define USTORM_EQE_CONS_OFFSET(pf_id) (IRO[5].base + ((pf_id) * IRO[5].m1))

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

56

#define USTORM_EQE_CONS_SIZE (IRO[5].size)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

58

#define USTORM_ETH_QUEUE_ZONE_OFFSET(queue_zone_id) (IRO[6].base + ((queue_zone_id) * IRO[6].m1))

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

59

#define USTORM_ETH_QUEUE_ZONE_SIZE (IRO[6].size)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

61

#define USTORM_COMMON_QUEUE_CONS_OFFSET(queue_zone_id) (IRO[7].base + ((queue_zone_id) * IRO[7].m1))

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

62

#define USTORM_COMMON_QUEUE_CONS_SIZE (IRO[7].size)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

64

#define XSTORM_INTEG_TEST_DATA_OFFSET (IRO[8].base)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

65

#define XSTORM_INTEG_TEST_DATA_SIZE (IRO[8].size)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

67

#define YSTORM_INTEG_TEST_DATA_OFFSET (IRO[9].base)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

68

#define YSTORM_INTEG_TEST_DATA_SIZE (IRO[9].size)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

70

#define PSTORM_INTEG_TEST_DATA_OFFSET (IRO[10].base)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

71

#define PSTORM_INTEG_TEST_DATA_SIZE (IRO[10].size)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

73

#define TSTORM_INTEG_TEST_DATA_OFFSET (IRO[11].base)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

74

#define TSTORM_INTEG_TEST_DATA_SIZE (IRO[11].size)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

76

#define MSTORM_INTEG_TEST_DATA_OFFSET (IRO[12].base)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

77

#define MSTORM_INTEG_TEST_DATA_SIZE (IRO[12].size)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

79

#define USTORM_INTEG_TEST_DATA_OFFSET (IRO[13].base)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

80

#define USTORM_INTEG_TEST_DATA_SIZE (IRO[13].size)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

82

#define TSTORM_LL2_RX_PRODS_OFFSET(core_rx_queue_id) (IRO[14].base + ((core_rx_queue_id) * IRO[14].m1))

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

83

#define TSTORM_LL2_RX_PRODS_SIZE (IRO[14].size)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

85

#define CORE_LL2_TSTORM_PER_QUEUE_STAT_OFFSET(core_rx_queue_id) (IRO[15].base + ((core_rx_queue_id) * IRO[15].m1))

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

86

#define CORE_LL2_TSTORM_PER_QUEUE_STAT_SIZE (IRO[15].size)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

88

#define CORE_LL2_USTORM_PER_QUEUE_STAT_OFFSET(core_rx_queue_id) (IRO[16].base + ((core_rx_queue_id) * IRO[16].m1))

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

89

#define CORE_LL2_USTORM_PER_QUEUE_STAT_SIZE (IRO[16].size)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

91

#define CORE_LL2_PSTORM_PER_QUEUE_STAT_OFFSET(core_tx_stats_id) (IRO[17].base + ((core_tx_stats_id) * IRO[17].m1))

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

92

#define CORE_LL2_PSTORM_PER_QUEUE_STAT_SIZE (IRO[17].size)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

94

#define MSTORM_QUEUE_STAT_OFFSET(stat_counter_id) (IRO[18].base + ((stat_counter_id) * IRO[18].m1))

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

95

#define MSTORM_QUEUE_STAT_SIZE (IRO[18].size)

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

97

#define MSTORM_ETH_PF_PRODS_OFFSET(queue_id) (IRO[19].base + ((queue_id) * IRO[19].m1))

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_iro.h

98

#define MSTORM_ETH_PF_PRODS_SIZE (IRO[19].size)