Symbol: IOMMU_PTOB
usr/src/uts/sun4/io/px/px_dma.h
165
((IOMMU_PTOB(pfn) < attrp->dma_attr_addr_lo) || \
usr/src/uts/sun4/io/px/px_dma.h
166
(IOMMU_PTOB(pfn) > attrp->dma_attr_addr_hi))
usr/src/uts/sun4u/io/pci/pci_dma.c
1012
IOMMU_PTOB(npages + HAS_REDZONE(mp)),
usr/src/uts/sun4u/io/pci/pci_dma.c
1038
mp->dmai_mapping = mp->dmai_roffset | IOMMU_PTOB(dvma_pg);
usr/src/uts/sun4u/io/pci/pci_dma.c
1059
dvma_addr = IOMMU_PTOB(dvma_pg);
usr/src/uts/sun4u/io/pci/pci_dma.c
1194
win_p->win_size = IOMMU_PTOB(end_idx - start_idx + 1);
usr/src/uts/sun4u/io/pci/pci_dma.c
1202
(IOMMU_PTOB(pfn_no + 1) - 1 <= count_max))
usr/src/uts/sun4u/io/pci/pci_dma.c
1206
MAKE_DMA_COOKIE(cookie_p, IOMMU_PTOB(seg_pfn0) | bypass_prefix,
usr/src/uts/sun4u/io/pci/pci_dma.c
1207
IOMMU_PTOB(pfn_no));
usr/src/uts/sun4u/io/pci/pci_dma.c
1209
IOMMU_PTOB(seg_pfn0) | bypass_prefix, pfn_no);
usr/src/uts/sun4u/io/pci/pci_dma.c
1215
MAKE_DMA_COOKIE(cookie_p, IOMMU_PTOB(seg_pfn0) | bypass_prefix,
usr/src/uts/sun4u/io/pci/pci_dma.c
1216
IOMMU_PTOB(pfn_no));
usr/src/uts/sun4u/io/pci/pci_dma.c
1218
IOMMU_PTOB(seg_pfn0) | bypass_prefix, pfn_no, cookie_no);
usr/src/uts/sun4u/io/pci/pci_dma.c
1373
(IOMMU_PTOB(pfn_no + 1) - 1 <= count_max))
usr/src/uts/sun4u/io/pci/pci_dma.c
1655
vmem_xfree(map_p, base_addr, IOMMU_PTOB(npages));
usr/src/uts/sun4u/io/pci/pci_dma.c
891
xfer_sz = IOMMU_PTOB(IOMMU_BTOP(xfer_sz + pg_off)); /* page align */
usr/src/uts/sun4u/io/pci/pci_dma.c
926
ASSERT(IOMMU_PTOB(npages) == mp->dmai_winsize);
usr/src/uts/sun4u/io/pci/pci_dma.c
957
*tte_addr = tte | IOMMU_PTOB(MP_PFN0(mp)); /* map page 0 */
usr/src/uts/sun4u/io/pci/pci_dma.c
964
*tte_addr = tte | IOMMU_PTOB(*pfn_addr);
usr/src/uts/sun4u/io/pci/pci_dma.c
972
mp->dmai_mapping = mp->dmai_roffset | IOMMU_PTOB(dvma_pg);
usr/src/uts/sun4u/io/pci/pci_fdvma.c
112
iommu_p->iommu_tsb_vaddr[pg_index + i] = tte | IOMMU_PTOB(pfn);
usr/src/uts/sun4u/io/pci/pci_fdvma.c
135
dvma_addr_t dvma_pg = IOMMU_BTOP(mp->dmai_mapping + IOMMU_PTOB(index));
usr/src/uts/sun4u/io/pci/pci_fdvma.c
139
mp->dmai_mapping, IOMMU_PTOB(index), IOMMU_PTOB(npg));
usr/src/uts/sun4u/io/pci/pci_fdvma.c
150
IOMMU_PTOB(index), IOMMU_PTOB(npg), sync_flags);
usr/src/uts/sun4u/io/pci/pci_fdvma.c
172
mp->dmai_mapping, IOMMU_PTOB(index), IOMMU_PTOB(npg));
usr/src/uts/sun4u/io/pci/pci_fdvma.c
173
pci_dma_sync(pci_p->pci_dip, mp->dmai_rdip, h, IOMMU_PTOB(index),
usr/src/uts/sun4u/io/pci/pci_fdvma.c
174
IOMMU_PTOB(npg), sync_flags);
usr/src/uts/sun4u/io/pci/pci_fdvma.c
225
IOMMU_PTOB(npages), IOMMU_PAGE_SIZE, 0,
usr/src/uts/sun4u/io/pci/pci_fdvma.c
257
mp->dmai_mapping = IOMMU_PTOB(dvma_pg);
usr/src/uts/sun4u/io/pci/pci_fdvma.c
84
dvma_addr = mp->dmai_mapping + IOMMU_PTOB(index);
usr/src/uts/sun4u/io/pci/pci_iommu.c
150
cache_size = IOMMU_PTOB(pci_dvma_page_cache_entries *
usr/src/uts/sun4u/io/pci/pci_iommu.c
156
IOMMU_PTOB(tsb_entries) - cache_size, IOMMU_PAGE_SIZE,
usr/src/uts/sun4u/io/pci/pci_iommu.c
283
volatile uint64_t cur_tte = IOMMU_PTOB(pfn) | tte;
usr/src/uts/sun4u/io/pci/pci_iommu.c
337
mp->dmai_mapping = IOMMU_PTOB(dvma_pg) | win_pg0_off;
usr/src/uts/sun4u/io/pci/pci_iommu.c
535
va = (caddr_t)(IOMMU_PTOB(base_pg_index + i));
usr/src/uts/sun4u/io/pci/pci_reloc.c
106
size_t length = IOMMU_PTOB(1);
usr/src/uts/sun4u/io/pci/pci_reloc.c
250
iommu_p->iommu_tsb_vaddr[pg_index + i] = tte | IOMMU_PTOB(pfn);
usr/src/uts/sun4u/io/pci/pci_reloc.c
273
endva = baseva + IOMMU_PTOB(fdvma_p->pagecnt[i]);
usr/src/uts/sun4u/io/pci/pci_reloc.c
322
endva = baseva + IOMMU_PTOB(fdvma_p->pagecnt[i]);
usr/src/uts/sun4u/io/pci/pcisch.c
3622
(void *)IOMMU_PTOB(req_p->dur_base),
usr/src/uts/sun4u/sys/pci/pci_dma.h
188
((IOMMU_PTOB(pfn) < attrp->dma_attr_addr_lo) || \
usr/src/uts/sun4u/sys/pci/pci_dma.h
189
(IOMMU_PTOB(pfn) > attrp->dma_attr_addr_hi))
usr/src/uts/sun4u/sys/pci/pci_iommu.h
210
*(iommu_p)->iommu_flush_page_reg = IOMMU_PTOB(dvma_pg)