INTEL_NB_5400
case INTEL_NB_5400:
if (nb_chipset == INTEL_NB_7300 || nb_chipset == INTEL_NB_5400) {
} else if (nb_chipset == INTEL_NB_5400 &&
if (nb_chipset == INTEL_NB_7300 || nb_chipset == INTEL_NB_5400) {
if (nb_chipset == INTEL_NB_5400) {
if (nb_chipset == INTEL_NB_5400) {
if (nb_chipset == INTEL_NB_5400 &&
case INTEL_NB_5400:
#define NRECMEMB_WR(branch) (nb_chipset == INTEL_NB_5400 ? \
if (nb_chipset == INTEL_NB_5400) \
if (nb_chipset == INTEL_NB_5400) \
if (nb_chipset == INTEL_NB_5400) \
if (nb_chipset == INTEL_NB_5400) \
if (nb_chipset == INTEL_NB_5400) \
if (nb_chipset == INTEL_NB_5400) \
if (nb_chipset == INTEL_NB_5400) \
if (nb_chipset == INTEL_NB_5400) \
if (nb_chipset == INTEL_NB_5400) \
if (nb_chipset == INTEL_NB_5400) \
if (nb_chipset == INTEL_NB_5400) \
if (nb_chipset == INTEL_NB_5400) \
if (nb_chipset == INTEL_NB_5400) \
if (nb_chipset == INTEL_NB_5400) \
if (nb_chipset == INTEL_NB_5400) \
if (nb_chipset == INTEL_NB_5400) \
if (nb_chipset == INTEL_NB_5400) \
nb_chipset == INTEL_NB_5400 ? \
#define PEX_ERR_DOCMD_RD(pex) ((nb_chipset == INTEL_NB_5400) ? \
#define PEX_ERR_DOCMD_WR(pex, val) ((nb_chipset == INTEL_NB_5400) ? \
nb_chipset == INTEL_NB_5400 ? ERR_5400_NF_FBD_MASK : \
#define EMASK_FBD_RES (nb_chipset == INTEL_NB_5400 ? 0 : EMASK_5000_FBD_RES)
#define ERR_INT_ALL (nb_chipset == INTEL_NB_5400 ? 0xffffffff : 0xff)
(nb_chipset == INTEL_NB_5400 || nb_chipset == INTEL_NB_5100 ? 2 : 3)
#define GE_FBD_FATAL ((nb_chipset == INTEL_NB_5400) ? GE_FERR_FBD_FATAL : \
#define GE_FBD_NF ((nb_chipset == INTEL_NB_5400) ? GE_FERR_FBD_NF : \
((nb_chipset == INTEL_NB_7300 || nb_chipset == INTEL_NB_5400) && \
(nb_chipset == INTEL_NB_5400) && \
(((mtr) & (nb_chipset == INTEL_NB_5400 || nb_chipset == INTEL_NB_5100) \
((mtr) & (nb_chipset == INTEL_NB_5400 || nb_chipset == INTEL_NB_5100 ? \
((mtr) & (nb_chipset == INTEL_NB_5400 || nb_chipset == INTEL_NB_5100 ? \
((mtr) & (nb_chipset == INTEL_NB_5400 || nb_chipset == INTEL_NB_5100 ? \
#define FERR_FAT_INT_RD(ip) (((nb_chipset == INTEL_NB_5400) ? \
(((mtr) & (nb_chipset == INTEL_NB_5400 ? 0x0020 : 0x0010)) ? 2 : 1))
#define FERR_NF_INT_RD(ip) ((nb_chipset == INTEL_NB_5400) ? \
#define NERR_FAT_INT_RD(ip) ((nb_chipset == INTEL_NB_5400) ? \
#define NERR_NF_INT_RD(ip) ((nb_chipset == INTEL_NB_5400) ? \
#define EMASK_INT_RD() ((nb_chipset == INTEL_NB_5400) ? \
#define ERR0_INT_RD() ((nb_chipset == INTEL_NB_5400) ? \
#define ERR1_INT_RD() ((nb_chipset == INTEL_NB_5400) ? \
#define ERR2_INT_RD() ((nb_chipset == INTEL_NB_5400) ? \
#define MCERR_INT_RD() ((nb_chipset == INTEL_NB_5400) ? \
#define FERR_FAT_INT_WR(val) if (nb_chipset == INTEL_NB_5400) { \
#define FERR_NF_INT_WR(val) if (nb_chipset == INTEL_NB_5400) { \
#define NERR_FAT_INT_WR(val) if (nb_chipset == INTEL_NB_5400) { \
#define NERR_NF_INT_WR(val) if (nb_chipset == INTEL_NB_5400) { \
#define EMASK_INT_WR(val) if (nb_chipset == INTEL_NB_5400) { \
#define ERR0_INT_WR(val) if (nb_chipset == INTEL_NB_5400) { \
#define ERR1_INT_WR(val) if (nb_chipset == INTEL_NB_5400) { \
#define ERR2_INT_WR(val) if (nb_chipset == INTEL_NB_5400) { \
#define MCERR_INT_WR(val) if (nb_chipset == INTEL_NB_5400) { \
nb_chipset == INTEL_NB_5400 ? 0xc8 : 0xc4, 0)
nb_chipset == INTEL_NB_5400 ? 0xcc : 0xc8, 0)
nb_chipset == INTEL_NB_5400 ? 0xc8 : 0xc4, 0)
nb_chipset == INTEL_NB_5400 ? 0xcc : 0xc8, 0)
#define NRECMEMA_RD(branch) (nb_chipset == INTEL_NB_5400 ? \
#define NRECMEMB_RD(branch) (nb_chipset == INTEL_NB_5400 ? \
#define NRECFGLOG_RD(branch) (nb_chipset == INTEL_NB_5400 ? \
#define NRECFBDA_RD(branch) (nb_chipset == INTEL_NB_5400 ? \
#define NRECFBDB_RD(branch) (nb_chipset == INTEL_NB_5400 ? \
#define NRECFBDC_RD(branch) (nb_chipset == INTEL_NB_5400 ? \
#define NRECFBDD_RD(branch) (nb_chipset == INTEL_NB_5400 ? \
#define NRECFBDE_RD(branch) (nb_chipset == INTEL_NB_5400 ? \
#define NRECFBDF_RD(branch) (nb_chipset == INTEL_NB_5400 ? \
#define REDMEMB_RD() (nb_chipset == INTEL_NB_5400 ? \
#define RECMEMA_RD(branch) (nb_chipset == INTEL_NB_5400 ? \
#define RECMEMB_RD(branch) (nb_chipset == INTEL_NB_5400 ? \
#define RECFGLOG_RD(branch) (nb_chipset == INTEL_NB_5400 ? \
#define RECFBDA_RD(branch) (nb_chipset == INTEL_NB_5400 ? \
#define RECFBDB_RD(branch) (nb_chipset == INTEL_NB_5400 ? \
#define RECFBDC_RD(branch) (nb_chipset == INTEL_NB_5400 ? \
#define RECFBDD_RD(branch) (nb_chipset == INTEL_NB_5400 ? \
#define RECFBDE_RD(branch) (nb_chipset == INTEL_NB_5400 ? \
#define RECFBDF_RD(branch) (nb_chipset == INTEL_NB_5400 ? \
#define NRECMEMA_WR(branch) (nb_chipset == INTEL_NB_5400 ? \
} else if (nb_chipset == INTEL_NB_5400) {
} else if (nb_chipset == INTEL_NB_5400) {
if (nb_chipset == INTEL_NB_5400)
if (nb_chipset == INTEL_NB_5400) {
if (nb_chipset == INTEL_NB_5400) {
if (nb_chipset == INTEL_NB_5400) {
case INTEL_NB_5400:
nb_chipset = INTEL_NB_5400;
if (nb_chipset == INTEL_NB_5400) {