INTEL_NB_5100
num_ranks_per_branch = (nb_chipset == INTEL_NB_5100) ?
num_ranks_per_branch = (nb_chipset == INTEL_NB_5100) ?
num_ranks_per_branch = (nb_chipset == INTEL_NB_5100) ?
num_ranks_per_branch = (nb_chipset == INTEL_NB_5100) ?
case INTEL_NB_5100:
if (nb_chipset == INTEL_NB_5100)
#define MTR_RD(branch, dimm) (nb_chipset == INTEL_NB_5100 ? \
nb_chipset == INTEL_NB_5100 ? \
nb_chipset == INTEL_NB_5100 ? nb_pci_getw(0, 16, 1, 0x48, 0) : \
if (nb_chipset == INTEL_NB_5100) \
} else if (nb_chipset == INTEL_NB_5100) { \
#define GE_NERR_FBD_FATAL (nb_chipset == INTEL_NB_5100 ? 0 : 0x01000000)
#define GE_NERR_FBD_NF (nb_chipset == INTEL_NB_5100 ? 0 : 0x00000100)
#define GE_NERR_MEM_NF (nb_chipset == INTEL_NB_5100 ? 0x00000100 : 0)
#define NB_MAX_DIMMS_PER_CHANNEL (nb_chipset == INTEL_NB_5100 ? 3 : \
(nb_chipset == INTEL_NB_5400 || nb_chipset == INTEL_NB_5100 ? 2 : 3)
(nb_chipset == INTEL_NB_5100) ? 0 : \
(nb_chipset == INTEL_NB_5100) ? 0 : \
#define GE_MEM_NF ((nb_chipset == INTEL_NB_5100) ? \
(((mtr) & (nb_chipset == INTEL_NB_5400 || nb_chipset == INTEL_NB_5100) \
((mtr) & (nb_chipset == INTEL_NB_5400 || nb_chipset == INTEL_NB_5100 ? \
((mtr) & (nb_chipset == INTEL_NB_5400 || nb_chipset == INTEL_NB_5100 ? \
((mtr) & (nb_chipset == INTEL_NB_5400 || nb_chipset == INTEL_NB_5100 ? \
#define MTR_NUMRANK(mtr) (nb_chipset == INTEL_NB_5100 ? 1 : \
} else if (nb_chipset == INTEL_NB_5100) {
if (nb_chipset == INTEL_NB_5100)
if (nb_chipset == INTEL_NB_5100)
case INTEL_NB_5100:
if (nb_chipset == INTEL_NB_5100)
if (nb_chipset == INTEL_NB_5100)
if (nb_chipset == INTEL_NB_5100) {
if (nb_chipset != INTEL_NB_5100)
if (nb_chipset == INTEL_NB_5100)
if (nb_chipset == INTEL_NB_5100) {