INFORMi
DbgMessage(pdev, INFORMi, "### lm_get_dev_info\n");
DbgMessage1(pdev, INFORMi, "vid 0x%x\n", pdev->hw_info.vid);
DbgMessage1(pdev, INFORMi, "did 0x%x\n", pdev->hw_info.did);
DbgMessage1(pdev, INFORMi, "svid 0x%x\n", pdev->hw_info.svid);
DbgMessage1(pdev, INFORMi, "ssid 0x%x\n", pdev->hw_info.ssid);
DbgMessage1(pdev, INFORMi, "IRQ 0x%x\n", pdev->hw_info.irq);
DbgMessage1(pdev, INFORMi, "Int pin 0x%x\n", pdev->hw_info.int_pin);
DbgMessage1(pdev, INFORMi, "Cache line size 0x%x\n", (u8_t) val);
DbgMessage1(pdev, INFORMi, "Latency timer 0x%x\n", (u8_t) (val >> 8));
DbgMessage1(pdev, INFORMi, "Revision id 0x%x\n", pdev->hw_info.rev_id);
DbgMessage1(pdev, INFORMi, "Mem base low 0x%x\n", pdev->hw_info.mem_base.as_u32.low);
DbgMessage1(pdev, INFORMi, "Mem base high 0x%x\n",
DbgMessage1(pdev, INFORMi, "Mapped base %p\n", pdev->vars.regview);
DbgMessage1(pdev, INFORMi, "chip id 0x%x\n", pdev->hw_info.chip_id);
DbgMessage(pdev, INFORMi, "read order %d write order %d\n", r_order, w_order);
DbgMessage(pdev, INFORMi, "dbg_zero_all_attn() inside!\n");
DbgMessage(pdev, INFORMi, "dbg_change_sb_index() inside!\n");
DbgMessage6(pdev, INFORMi, "dbg_change_sb_index():sb#%d indices are now: c_def_prod_idx:%d, u_def_prod_idx:%d, x_def_prod_idx:%d, t_def_prod_idx:%d\n",
DbgMessage3(pdev, INFORMi, "dbg_change_sb_index():sb#%d indices are now: c_rss_prod_idx:%d, u_rss_prod_idx:%d\n",
DbgMessage(pdev, INFORMi, "dbg_def_sb_dpc(): inside!\n");
DbgMessage(pdev, INFORMi, "dbg_def_sb_dpc(): no change in status index so get out!\n");
DbgMessage2(pdev, INFORMi, "dbg_def_sb_dpc(): asserted_proc_grps:0x%x, deasserted_proc_grps:0x%x\n", asserted_proc_grps, deasserted_proc_grps);
DbgMessage2(pdev, INFORMi, "um_bdrv_def_dpc(): cnt_acks:%d, total_activ_to_ack:0x%x\n", cnt_acks, total_activ_to_ack);
DbgMessage(pdev, INFORMi, "dbg_def_sb_dpc(): FINISH _______________________________________________\n");
DbgMessage1(pdev, INFORMi, "dbg_sb_dpc(): handling RSS status block #%d\n", rss_id);
DbgMessage(pdev, INFORMi, "handle_sb(): no change is status index so get out!\n");
DbgMessage2(pdev, INFORMi, "dbg_sb_dpc(): cnt_acks:%d, total_activ_to_ack:0x%x\n", cnt_acks, total_activ_to_ack);
DbgMessage1(pdev, INFORMi, "dbg_assert_attn_lines() inside! lines_to_assert:0x%x\n", lines_to_assert);
DbgMessage(pdev, INFORMi, "handle_sb(): FINISH _______________________________________________\n");
DbgMessage(pdev, INFORMi, "dbg_isr() inside!\n");
DbgMessage1(pdev, INFORMi, "dbg_isr(): intr_recognized is:%s\n", intr_recognized ? "TRUE" : "FALSE");
DbgMessage1(pdev, INFORMi, "dbg_deassert_attn_lines() inside! lines_to_deassert:0x%x\n", lines_to_deassert);
DbgMessage1(pdev, INFORMi, "dbg_ack_assert_attn_lines() inside! assert_lines_to_ack:0x%x\n", assert_lines_to_ack);
DbgMessage(pdev, INFORMi|INFORMl2sp, " lm_mp_cos_from_chain: ");
DbgMessage(pdev, INFORMi, "max_toe_conn from shmem %d for port %d\n",val, port);
DbgMessage(pdev, INFORMi, "max_rdma_conn from shmem %d for port %d\n",val, port);
DbgMessage(pdev, INFORMi, "max_iscsi_conn from shmem %d for port %d\n",val, port);
DbgMessage(pdev, INFORMi, "max_fcoe_conn from shmem %d for port %d\n",val, port);
DbgMessage(pdev, INFORMi, "max_toe_conn from shmem %d\n",pdev->hw_info.max_port_toe_conn);
DbgMessage(pdev, INFORMi, "max_rdma_conn from shmem %d\n",pdev->hw_info.max_port_rdma_conn);
DbgMessage(pdev, INFORMi, "max_iscsi_conn from shmem %d\n",pdev->hw_info.max_port_iscsi_conn);
DbgMessage(pdev, INFORMi, "max_fcoe_conn from shmem %d\n",pdev->hw_info.max_port_fcoe_conn);
DbgMessage(pdev, INFORMi, "MF cfg parameters for function %d:\n", func_id);
DbgMessage(pdev, INFORMi, "\t func_mf_cfg=0x%x\n\t multi_vnics_mode=%d\n\t vnics_per_port=%d\n\t ovlan/vifid=%d\n\t min_bw=%d\n\t max_bw=%d\n",
DbgMessage(pdev, INFORMi, "\t mac addr (overiding main and iscsi): %02x %02x %02x %02x %02x %02x\n",
DbgMessage(pdev, INFORMi, "nvm_hw_config %d\n",val);
DbgMessage(pdev, INFORMi, "nvm_hw_configs %d\n",val);
DbgMessage(pdev, INFORMi, "board_sn: ");
DbgMessage(pdev, INFORMi, "%02x",pdev->hw_info.board_num[i]);
DbgMessage(pdev, INFORMi, "\n");
DbgMessage(pdev, INFORMi, "mba_features %d\n",pdev->hw_info.mba_features);
DbgMessage(pdev, INFORMi, "mba_vlan_cfg 0x%x\n",pdev->hw_info.mba_vlan_cfg);
DbgMessage(pdev, INFORMi, "port_feature_config 0x%x\n",pdev->hw_info.port_feature_config);
DbgMessage(pdev, INFORMi, "speed_cap_mask1 %d\n",val);
DbgMessage(pdev, INFORMi, "speed_cap_mask2 %d\n",val);
DbgMessage(pdev, INFORMi, "lane_config %d\n",val);
DbgMessage(pdev, INFORMi, "link config %d\n",val);
DbgMessage(pdev, INFORMi, "eee_power_mode 0x%x\n", pdev->params.link.eee_mode);
DbgMessage(pdev, INFORMi, "main mac addr: %02x %02x %02x %02x %02x %02x\n",
DbgMessage(pdev, INFORMi, "iSCSI mac addr: %02x %02x %02x %02x %02x %02x\n",
DbgMessage(pdev, INFORMi, "reg 0xd8 0x%x \n max_payload %d max_read_req %d \n",
DbgMessage(pdev, INFORMi, "bc_rev %d\n",val);
DbgMessage(pdev, INFORMi, "uc_table_size[ndis]=%d, uc_table_size[ndis]=%d, mc_table_size[ndis]=%d\n",
DbgMessage(pdev, INFORMi, "uc_table_size[ndis]=%d, uc_table_size[ndis]=%d, mc_table_size[ndis]=%d\n",
DbgMessage(pdev, INFORMi, "uc_table_size[ndis]=%d, uc_table_size[ndis]=%d, uc_table_size[fcoe]=%d, mc_table_size[ndis]=%d, mc_table_size[fcoe]=%d\n",
DbgMessage(pdev, INFORMi, "vid 0x%x\n", pdev->hw_info.vid);
DbgMessage(pdev, INFORMi, "did 0x%x\n", pdev->hw_info.did);
DbgMessage(pdev, INFORMi, "svid 0x%x\n", pdev->hw_info.svid);
DbgMessage(pdev, INFORMi, "ssid 0x%x\n", pdev->hw_info.ssid);
DbgMessage(pdev, INFORMi, "IRQ 0x%x\n", pdev->hw_info.irq);
DbgMessage(pdev, INFORMi, "Int pin 0x%x\n", pdev->hw_info.int_pin);
DbgMessage(pdev, INFORMi , "### lm_init_param\n");
DbgMessage(pdev, INFORMi, "Cache line size 0x%x\n", (u8_t) val);
DbgMessage(pdev, INFORMi, "Latency timer 0x%x\n", (u8_t) (val >> 8));
DbgMessage(pdev, INFORMi, "Emulation is detected.\n");
DbgMessage(pdev, INFORMi, "Revision id 0x%x\n", pdev->hw_info.rev_id);
DbgMessage(pdev, INFORMi , "test mode is 0x%x \n",pdev->params.test_mode);
DbgMessage(pdev, INFORMi, "ASIC is detected.\n");
DbgMessage(pdev, INFORMi, "pcie_lane_width 0x%x\n", pdev->hw_info.pcie_lane_width);
DbgMessage(pdev, INFORMi , "### lm_get_dev_info\n");
DbgMessage(pdev, INFORMi, "pcie_lane_speed 0x%x\n", pdev->hw_info.pcie_lane_speed);
DbgMessage(pdev, INFORMi , "### lm_get_dev_info exit\n");
DbgMessage(pdev, INFORMi, "lm_verify_validity_map: shmem signature %d\n",val);
DbgMessage(pdev, INFORMi, "BAR %d low 0x%x\n", bar_num,
DbgMessage(pdev, INFORMi, "BAR %d high 0x%x\n", bar_num,
DbgMessage(pdev, INFORMi, "Bar_Offset=0x%x\n", pdev->hw_info.mem_base[i]);
DbgMessage(pdev, INFORMi, "bar %d size 0x%x\n", i, pdev->hw_info.bar_size[i]);
DbgMessage(pdev, INFORMi, "mem_base[%d]=%p size=0x%x\n", i, pdev->vars.mapped_bar_addr[i], pdev->hw_info.bar_size[i]);
DbgMessage(pdev, INFORMi, "FPGA: forcing MPS from %d to 0.\n", pdev->hw_info.max_payload_size);
DbgMessage(pdev, INFORMi , "chip id 0x%x\n", pdev->hw_info.chip_id);
DbgMessage(pdev, INFORMi , "silent chip rev 0x%x\n", pdev->hw_info.silent_chip_rev);
DbgMessage(pdev, INFORMi, "VEC[%d]=%d\n", igu_sb_id, vec);
INFORMi,
DbgMessage(pdev, INFORMi, "timer status on %d \n",val);
DbgMessage(pdev, INFORMi, "lm_reset_function_part BRB1 is not empty %d blooks are occupied\n",val);
DbgMessage(pdev, INFORMi , "### lm_chip_reset\n");
DbgMessage(pdev, INFORMi, "lm_chip_start\n");
DbgMessage(pdev, INFORMi, "chipid is 0x%x, rev is 0x%x\n", CHIP_NUM(pdev), CHIP_REV(pdev));
DbgMessage(pdev, INFORMi, "chip is E2\n");
DbgMessage(pdev, INFORMi, "chip is E3\n");
DbgMessage(pdev, INFORMi, "chip is ASIC\n");
DbgMessage(pdev, INFORMi, "chip is EMUL/FPGA. modified chip_rev is 0x%x\n", chip_rev);
DbgMessage(pdev, INFORMi, "chip is E3 Ax\n");
DbgMessage(pdev, INFORMi, "chip is E3 Bx\n");
DbgMessage(pdev, INFORMi, "chip is not E2/E3\n");
DbgMessage(pdev, INFORMi, "init_common_part\n");
DbgMessage(pdev, INFORMi, "init_function_part, func=%d\n", func);
DbgMessage(pdev, INFORMi , "### lm_chip_init %x\n",CHIP_NUM(pdev));
DbgMessage(pdev, INFORMi , "mcp_cmd_send_and_recieve: Sent driver cmd=0x%x to MCP\n", drv_msg );
DbgMessage(pdev, INFORMi , "mcp_cmd_send_and_recieve: Got response 0x%x from MCP\n", *p_fw_resp );
DbgMessage(pdev, INFORMi , "Sent driver pulse cmd to MCP\n");
DbgMessage(pdev, INFORMi , "### mcp_cmd_init\n");
DbgMessage(pdev, INFORMi , "### mcp_cmd_send mb_type=0x%x drv_msg=0x%x param=0x%x\n", mb_type, drv_msg, param );
DbgMessage(pdev, INFORMi , "mcp_cmd_send: Sent driver load cmd to MCP at 0x%x\n", drv_msg);
DbgMessage(pdev, INFORMi, "### mcp_cmd_response mb_type=0x%x drv_msg=0x%x\n", mcp_mb_type, drv_msg );
DbgMessage(pdev, INFORMi, "lm_is_rx_completion: result is:%s\n", result? "TRUE" : "FALSE");
DbgMessage(pdev, INFORMi | INFORMl2sp, "#lm_alloc_eq\n");
DbgMessage(pdev, INFORMi|INFORMl2sp, "#lm_setup_tpa, cid=%d\n",cid);
DbgMessage(pdev, INFORMi|INFORMl2sp, "#lm_setup_tpa, cid=%d\n",cid);
DbgMessage(pdev, INFORMi, "rxq[%d] bd_chain[%d] %p, bd_left %d\n", cid,
DbgMessage(pdev, INFORMi, " bd_chain_phy[%d] 0x%x%08x\n", bd_chain->bd_chain_phy.as_u32.high,
DbgMessage(pdev, INFORMi , "### lm_common_setup_alloc_resc b_is_alloc=%s\n", b_is_alloc ? "TRUE" : "FALSE" );
DbgMessage(pdev, INFORMi , "### lm_alloc_resc\n");
DbgMessage(pdev, INFORMi , "### exit lm_alloc_resc\n");
DbgMessage(pdev, INFORMi | INFORMl2sp, "#lm_alloc_txq, cid=%d, page_cnt=%d\n", cid, page_cnt);
DbgMessage(pdev, INFORMi, "#lm_alloc_rxq, cid=%d, page_cnt=%d, desc_cnt=%d\n",
DbgMessage(pdev, INFORMi | INFORMl2sp,
DbgMessage(pdev, INFORMi, "#lm_alloc_tpa, cid=%d, page_cnt=%d, desc_cnt=%d\n",
DbgMessage(pdev, INFORMi|INFORMl2sp, "#lm_setup_txq, cid=%d\n",cid);
DbgMessage(pdev, INFORMi, "txq %d, bd_chain %p, bd_left %d\n",
DbgMessage(pdev, INFORMi, " bd_chain_phy 0x%x%08x\n",
DbgMessage(pdev, INFORMi|INFORMl2sp, "#lm_setup_rxq, cid=%d\n",cid);
DbgMessage(pdev, INFORMi, "rxq[%d] bd_chain[%d] %p, bd_left %d\n", cid,
DbgMessage(pdev, INFORMi, " bd_chain_phy[%d] 0x%x%08x\n", rx_chain_idx_cur,
DbgMessage(pdev, INFORMi|INFORMl2sp, "#lm_setup_rcq, cid=%d\n",cid);
DbgMessage(pdev, INFORMi, "rcq %d, bd_chain %p, bd_left %d\n", cid,
DbgMessage(pdev, INFORMi, " bd_chain_phy 0x%x%08x\n", rcq_chain->bd_chain.bd_chain_phy.as_u32.high,
DbgMessage(pdev, INFORMi, "clear_status_block: fw_sb_id:%d\n",fw_sb_id);
DbgMessage(pdev, INFORMi, "HC set to %d for SB%d(index%d)\n",is_enable,sb_id,idx);
DbgMessage(pdev, INFORMi, "HC already set to %d for SB%d(index%d)\n",is_enable,sb_id,idx);
DbgMessage(pdev, INFORMi, "BEFORE update: hc_def_ack:%d, attn_def_ack:%d\n",
DbgMessage(pdev, INFORMi, "AFTER update: hc_def_ack:%d, attn_def_ack:%d\n",
DbgMessage(pdev, INFORMi, "lm_update_hc_indices: inside with sb_idx:%d\n", drv_sb_id);
DbgMessage(pdev, INFORMi, "BEFORE update: c_hc_ack:%d\n", pdev->vars.c_hc_ack[drv_sb_id]);
DbgMessage(pdev, INFORMi, "BEFORE update: u_hc_ack:%d\n", pdev->vars.u_hc_ack[drv_sb_id]);
DbgMessage(pdev, INFORMi, "AFTER update: c_hc_ack:%d\n", pdev->vars.c_hc_ack[drv_sb_id]);
DbgMessage(pdev, INFORMi, "AFTER update: u_hc_ack:%d\n", pdev->vars.u_hc_ack[drv_sb_id]);
DbgMessage(pdev, INFORMi, "lm_is_def_sb_updated() inside!\n");
DbgMessage(pdev, INFORMi, "lm_is_sb_updated: sp running_index:%d, hc_def_ack:%d\n",
DbgMessage(pdev, INFORMi, "lm_is_sb_updated: def.attn_bits_index:%d attn_def_ack:%d\n",
DbgMessage(pdev, INFORMi, "lm_is_def_sb_updated: result:%s\n", result? "TRUE" : "FALSE");
DbgMessage(pdev, INFORMi, "print_sb_info() inside!\n");
DbgMessage(pdev, INFORMi, "rss sb #%d: u_new_cons:%d, c_new_cons:%d, c_status idx:%d, c_sbID:%d, u_status idx:%d, u_sbID:%d\n",
DbgMessage(pdev, INFORMi, "____________________________________________________________\n");
DbgMessage(pdev, INFORMi, "sp sb: c_status idx:%d, c_sbID:%d\n",
DbgMessage(pdev, INFORMi, "____________________________________________________________\n");
DbgMessage(pdev, INFORMi, "init_status_block: host_sb_addr_low:0x%x; host_sb_addr_low:0x%x\n",
DbgMessage(pdev, INFORMi, "init_attn_igu_status_block: host_sb_addr_low:0x%x; host_sb_addr_low:0x%x\n",
DbgMessage(pdev, INFORMi, "init_status_blocks() inside! func:%d\n",FUNC_ID(pdev));
DbgMessage(pdev, INFORMi, "lm_handle_deassertion_processing: group %d mask1:0x%x, mask2:0x%x, mask3:0x%x, mask4:0x%x, mask5:0x%x\n",
DbgMessage(pdev, INFORMi, "lm_int_ack_sb() inside! rss_id:%d, sb_index:%d, func_num:%d is_update:%d\n", rss_id, sb_index, FUNC_ID(pdev), is_update_idx);
DbgMessage(pdev, INFORMi, "lm_int_ack_sb() inside! data:0x%x; status_block_index:%d\n", hc_data.sb_id_and_flags, hc_data.status_block_index);
DbgMessage(pdev, INFORMi, "lm_int_ack_sb() result:0x%x\n", result);
DbgMessage(pdev, INFORMi, "lm_is_tx_completion: result is:%s\n", result? "TRUE" : "FALSE");
DbgMessage(pdev, INFORMi|INFORMl2sp, "#lm_terminate_eth_con, cid=%d \n",cid);
DbgMessage(pdev, INFORMi|INFORMl2sp, "#lm_cfc_del_eth_con, cid=%d\n",cid);
DbgMessage(pdev, INFORMi | INFORMl2sp, "lm_establish_forward_con\n");
DbgMessage(pdev,INFORMi | INFORMl2sp, "Establish forward connection ramrod completed\n");
DbgMessage(pdev,INFORMi | INFORMl2sp, "lm_close_forward_con completed\n");
DbgMessage(pdev,INFORMi | INFORMl2sp, "lm_close_eth_con completed for cid=%d\n", cid);
DbgMessage(pdev, INFORMi|INFORMl2sp, "#lm_establish_eth_con, cid=%d\n",cid);
DbgMessage(pdev, INFORMi|INFORMl2sp, "#lm_empty_ramrod_eth_conn, curr_state=%d\n",curr_state);
DbgMessage(pdev, INFORMi, "BMAC stats should never be collected on port 1 of E2!\n");
DbgMessage(pdev, INFORMi, "lm_is_sb_updated():u_sb.status_block_index:%d u_hc_ack:%d\n",
DbgMessage(pdev, INFORMi, "lm_is_sb_updated():c_sb.status_block_index:%d c_hc_ack:%d\n",
DbgMessage(pdev, INFORMi, "lm_is_sb_updated(): result:%s\n", result? "TRUE" : "FALSE");
DbgMessage(pdev, INFORMi, "LM_INTMEM_READ8() inside! storm:%s address:0x%x\n",#_type,_type); \
DbgMessage(pdev, INFORMi, "LM_INTMEM_WRITE8() inside! storm:%s address:0x%x\n",#_type,_type); \
DbgMessage(pdev, INFORMi, "LM_INTMEM_READ16() inside! storm:%s address:0x%x\n",#_type,_type); \
DbgMessage(pdev, INFORMi, "LM_INTMEM_WRITE16() inside! storm:%s address:0x%x offset=%x val=%x\n",#_type,_type, _offset, _val); \
DbgMessage(pdev, INFORMi, "LM_INTMEM_READ32() inside! storm:%s address:0x%x\n",#_type,_type); \
DbgMessage(pdev, INFORMi, "LM_INTMEM_WRITE32() inside! storm:%s address:0x%x\n",#_type,_type); \
DbgMessage(pdev, INFORMi, "LM_INTMEM_READ64() inside! storm:%s address:0x%x\n",#_type,_type); \
DbgMessage(pdev, INFORMi, "LM_INTMEM_WRITE64() inside! storm:%s address:0x%x\n",#_type,_type); \
DbgMessage(pdev, INFORMi | INFORMl5sp, "#lm_alloc_eq, eq_chain=%p, page_cnt=%d\n", eq_chain, page_cnt);
DbgMessage(pdev, INFORMi|INFORMl5sp, "#lm_sc_setup_eq, idx=%d\n",idx);
DbgMessage(pdev, INFORMi, "is eq %d, bd_chain %p, bd_left %d\n",
DbgMessage(pdev, INFORMi, " bd_chain_phy 0x%x%08x\n",
DbgMessage(pdev, INFORMi|INFORMl5sp, "#lm_fc_alloc_eq_pbl\n");
DbgMessage(pdev, INFORMi|INFORMl5sp, "#lm_fc_setup_eq, idx=%d\n",idx);
DbgMessage(pdev, INFORMi, "fc eq %d, bd_chain %p, bd_left %d\n",
DbgMessage(pdev, INFORMi, " bd_chain_phy 0x%x%08x\n",