INFORM
dpkt = init_pkt(dsmp, INFORM);
case INFORM:
*pl->opts[CD_DHCP_TYPE]->value > INFORM)
DbgMessage(pdev, INFORM, cfg_table[idx].name);
DbgMessage(pdev, INFORM, " detected.\n");
DbgMessage(pdev, INFORM, "### lm_nvram_init\n");
DbgMessage(pdev, INFORM, cfg_table[idx].name);
DbgMessage(pdev, INFORM, " reconfiguring.\n");
DbgMessage(pdev, INFORM, "### lm_nvram_query\n");
DbgMessage(pdev, INFORM, "Reconfigured ");
DbgMessage(pdev, INFORM, cfg_table[idx].name);
DbgMessage(pdev, INFORM, " detected.\n");
DbgMessage(pdev, INFORM, "phy init link up\n");
DbgMessage(pdev, INFORM, "phy init link down\n");
DbgMessage1(pdev, INFORM, "Phy Id1 0x%x\n", val);
DbgMessage1(pdev, INFORM, "Phy Id2 0x%x\n", val);
DbgMessage(pdev, INFORM, "enable serdes_fallback_1g\n");
DbgMessage(pdev, INFORM, "enable serdes_fallback_2.5g\n");
DbgMessage(pdev, INFORM, "disable serdes_fallback.\n");
DbgMessage(pdev, INFORM, "phy init link up\n");
DbgMessage(pdev, INFORM, "phy init link down\n");
DbgMessage1(pdev, INFORM, "Phy Id1 0x%x\n", val);
DbgMessage1(pdev, INFORM, "Phy Id2 0x%x\n", val);
DbgMessage(pdev, INFORM, "Set up MAC loopback mode.\n");
DbgMessage(pdev, INFORM, "### init_null_phy\n");
DbgMessage(pdev, INFORM, "Local flow control settings.\n");
DbgMessage(pdev, INFORM, " PAUSE capable.\n");
DbgMessage(pdev, INFORM, " ASYM_PAUSE capable.\n");
DbgMessage(pdev, INFORM, "Remote flow control settings.\n");
DbgMessage(pdev, INFORM, " PAUSE capable.\n");
DbgMessage(pdev, INFORM, " ASYM_PAUSE capable.\n");
DbgMessage(pdev, INFORM, "FlowCap: tx/rx\n");
DbgMessage(pdev, INFORM, "FlowCap: rx PAUSE\n");
DbgMessage(pdev, INFORM, "FlowCap: tx/rx\n");
DbgMessage(pdev, INFORM, "FlowCap: tx PAUSE\n");
DbgMessage(pdev, INFORM, "Flow control capabilities.\n");
DbgMessage(pdev, INFORM, " tx PAUSE\n");
DbgMessage(pdev, INFORM, " rx PAUSE\n");
DbgMessage(pdev, INFORM, " none.\n");
DbgMessage(pdev, INFORM, "Enable rx PAUSE.\n");
DbgMessage(pdev, INFORM, "Enable tx PAUSE.\n");
DbgMessage(pdev, INFORM, "### get_copper_phy_link\n");
DbgMessage(pdev, INFORM, "link down.\n");
DbgMessage(pdev, INFORM, "detected 1gb full autoneg.\n");
DbgMessage(pdev, INFORM, "detected 1gb half autoneg.\n");
DbgMessage(pdev, INFORM, "detected 100mb full autoneg.\n");
DbgMessage(pdev, INFORM, "detected 100mb half autoneg.\n");
DbgMessage(pdev, INFORM, "detected 10mb full autoneg.\n");
DbgMessage(pdev, INFORM, "detected 10mb half autoneg.\n");
DbgMessage(pdev, INFORM, "PHY forced to 100mb.\n");
DbgMessage(pdev, INFORM, "PHY forced to 1gb.\n");
DbgMessage(pdev, INFORM, "PHY forced to 10mb.\n");
DbgMessage(pdev, INFORM, "PHY forced to full duplex.\n");
DbgMessage(pdev, INFORM, "PHY forced to half duplex.\n");
DbgMessage(pdev, INFORM, "no cable, default to autoneg.\n");
DbgMessage(pdev, INFORM, "switch to force mode - 1G full\n");
DbgMessage(pdev, INFORM, "switch to autoneg mode - 1G full\n");
DbgMessage1(pdev, INFORM, "Phy Id1 0x%x\n", val);
DbgMessage(pdev, INFORM, "serdes link down.\n");
DbgMessage1(pdev, INFORM, "Phy Id2 0x%x\n", val);
DbgMessage(pdev, INFORM, "serdes autoneg to 2.5gb.\n");
DbgMessage(pdev, INFORM, "serdes autoneg to 1gb.\n");
DbgMessage(pdev, INFORM, "serdes autoneg to 100mb.\n");
DbgMessage(pdev, INFORM, "serdes autoneg to 10mb.\n");
DbgMessage(pdev, INFORM, "serdes autoneg to full duplex.\n");
DbgMessage(pdev, INFORM, "serdes autoneg to half duplex.\n");
DbgMessage(pdev, INFORM, "serdes autoneg to full duplex.\n");
DbgMessage(pdev, INFORM, "serdes forced to 2.5gb.\n");
DbgMessage(pdev, INFORM, "serdes forced to 1gb.\n");
DbgMessage(pdev, INFORM, "serdes forced to 100mb.\n");
DbgMessage(pdev, INFORM, "serdes forced to 10mb.\n");
DbgMessage(pdev, INFORM, "serdes forced to full duplex.\n");
DbgMessage(pdev, INFORM, "serdes forced to half duplex.\n");
DbgMessage(pdev, INFORM, "serdes link up.\n");
DbgMessage(pdev, INFORM, "serdes autoneg to full duplex.\n");
DbgMessage(pdev, INFORM, "serdes autoneg to half duplex.\n");
DbgMessage(pdev, INFORM, "serdes forced to full duplex.\n");
DbgMessage(pdev, INFORM, "serdes forced to half duplex.\n");
DbgMessage(pdev, INFORM, "serdes link down.\n");
DbgMessage(pdev, INFORM, "autoneg 10mb hd\n");
DbgMessage(pdev, INFORM, "and 10mb fd\n");
DbgMessage(pdev, INFORM, "force 10mb hd\n");
DbgMessage(pdev, INFORM, "force 10mb fd\n");
DbgMessage(pdev, INFORM, "autoneg 10mb and 100mb hd\n");
DbgMessage(pdev, INFORM, "and 100mb fd\n");
DbgMessage(pdev, INFORM, "force 100mb hd\n");
DbgMessage(pdev, INFORM, "force 100mb fd\n");
DbgMessage(pdev, INFORM, "autoneg 10/100mb and 1000mb hd\n");
DbgMessage(pdev, INFORM, "and 1000mb fd\n");
DbgMessage(pdev, INFORM, "phy init - restart autoneg\n");
DbgMessage(pdev, INFORM, "phy init link up\n");
DbgMessage(pdev, INFORM, "phy init link down\n");
DbgMessage1(pdev, INFORM, "Phy Id1 0x%x\n", val);
DbgMessage1(pdev, INFORM, "Phy Id2 0x%x\n", val);
DbgMessage1(pdev, INFORM, "Reset done, idx = %d\n", idx);
DbgMessage6(pdev, INFORM, "mac addr: %02x %02x %02x %02x %02x %02x\n",
DbgMessage(pdev, INFORM, "Duplicated nwuf entry.\n");
DbgMessage1(pdev, INFORM, "bar_size 0x%x\n", pdev->hw_info.bar_size);
DbgMessage(pdev, INFORM, "32bit bus width.\n");
DbgMessage(pdev, INFORM, "64bit bus width.\n");
DbgMessage(pdev, INFORM, "PCIX bus detected.\n");
DbgMessage(pdev, INFORM, "Bus speed is 133Mhz.\n");
DbgMessage(pdev, INFORM, "Bus speed is 100Mhz.\n");
DbgMessage(pdev, INFORM, "Bus speed is 66Mhz.\n");
DbgMessage(pdev, INFORM, "Bus speed is 50Mhz.\n");
DbgMessage(pdev, INFORM, "Bus speed is 33Mhz.\n");
DbgMessage(pdev, INFORM, "Conventional PCI bus detected.\n");
DbgMessage(pdev, INFORM, "Bus speed is 66Mhz.\n");
DbgMessage(pdev, INFORM, "Bus speed is 33Mhz.\n");
DbgMessage2(_pdev, INFORM, "rd 0x%04x = 0x%08x\n", _offset, _val); \
DbgMessage2(_pdev, INFORM, "wr 0x%04x 0x%08x\n", _offset, _val); \
DbgMessage3(_pdev, INFORM, "mbq_wr32 (0x%04x,0x%02x) = 0x%08x\n", \
DbgMessage3(_pdev, INFORM, "mbq_wr32 (0x%04x,0x%02x) = 0x%08x\n", \
DbgMessage3(_pdev, INFORM, "mbq_wr16 (0x%04x,0x%02x) = 0x%04x\n", \
DbgMessage3(_pdev, INFORM, "mbq_wr8 (0x%04x,0x%02x) = 0x%02x\n", \
DbgMessage(pdev, INFORM, "idle_chk. lm_disable_timer(1) timer is active\n");
DbgMessage(pdev, INFORM, "idle_chk. lm_disable_timer(0) timer is not active\n");
DbgMessage(pdev, INFORM, "idle_chk. lm_disable_timer(0) timer is active\n");
DbgMessage(pdev, INFORM, "idle_chk. lm_disable_timer(1) timer is not active\n");
DbgMessage(pdev, INFORM, "******************DCBX configuration******************************\n");
DbgMessage(pdev, INFORM, "pfc_fw_cfg->dcb_version %x\n",pfc_fw_cfg->dcb_version);
DbgMessage(pdev, INFORM, "pdev->params.dcbx_port_params.pfc.priority_non_pauseable_mask %x\n",
DbgMessage(pdev, INFORM, "pdev->params.dcbx_port_params.ets.cos_params[%d].pri_bitmask %x\n",cos,
DbgMessage(pdev, INFORM, "pdev->params.dcbx_port_params.ets.cos_params[%d].bw_tbl %x\n",cos,
DbgMessage(pdev, INFORM, "pdev->params.dcbx_port_params.ets.cos_params[%d].strict %x\n",cos,
DbgMessage(pdev, INFORM, "pdev->params.dcbx_port_params.ets.cos_params[%d].pauseable %x\n",cos,
DbgMessage(pdev, INFORM,
DbgMessage(pdev, INFORM, "pfc_fw_cfg->traffic_type_to_priority_cos[%d].priority %x\n",pri,
DbgMessage(pdev, INFORM, "pfc_fw_cfg->traffic_type_to_priority_cos[%d].cos %x\n",pri,
DbgMessage(pdev, INFORM, "local_mib.error %x\n",local_mib->error);
DbgMessage(pdev, INFORM, "local_mib.features.ets.enabled %x\n",local_mib->features.ets.enabled);
DbgMessage(pdev, INFORM, "local_mib.features.ets.pg_bw_tbl[%x] %x\n",i,DCBX_PG_BW_GET(local_mib->features.ets.pg_bw_tbl,i));
DbgMessage(pdev, INFORM,"local_mib.features.ets.pri_pg_tbl[%x] %x\n",i,DCBX_PRI_PG_GET(local_mib->features.ets.pri_pg_tbl,i));
DbgMessage(pdev, INFORM, "local_mib.features.pfc.pri_en_bitmap %x\n",local_mib->features.pfc.pri_en_bitmap);
DbgMessage(pdev, INFORM, "local_mib.features.pfc.pfc_caps %x\n",local_mib->features.pfc.pfc_caps);
DbgMessage(pdev, INFORM, "local_mib.features.pfc.enabled %x\n",local_mib->features.pfc.enabled);
DbgMessage(pdev, INFORM, "local_mib.features.app.default_pri %x\n",local_mib->features.app.default_pri);
DbgMessage(pdev, INFORM, "local_mib.features.app.tc_supported %x\n",local_mib->features.app.tc_supported);
DbgMessage(pdev, INFORM, "local_mib.features.app.enabled %x\n",local_mib->features.app.enabled);
DbgMessage(pdev, INFORM,"local_mib.features.app.app_pri_tbl[%x].app_id %x\n",
DbgMessage(pdev, INFORM, "local_mib.features.app.app_pri_tbl[%x].pri_bitmap %x\n",
DbgMessage(pdev, INFORM, "local_mib.features.app.app_pri_tbl[%x].appBitfield %x\n",
DbgMessage(pdev, INFORM, "lm_dcbx_app_find_non_off_tt_entry :FCOE entry");
DbgMessage(pdev, INFORM, "lm_dcbx_app_find_non_off_tt_entry :ISCSI entry");
DbgMessage(pdev, INFORM, "ETS is disabled other ETS paramters not checked \n");
DbgMessage(pdev, INFORM , "relative function %d absolute function %d\n", pdev->params.pfunc_rel, pdev->params.pfunc_abs);
DbgMessage(pdev, INFORM, "M:0x%x, TR:0x%x, TW:0x%x\n",m_e,tr_e,tw_e);
DbgMessage(NULL, INFORM, "lm_blink_traffic_led() port %d write to EMAC_REG_EMAC_LED the value 0x%x\n", port_idx, reg_val);
DbgMessage(NULL, INFORM, "lm_blink_traffic_led() set BLINK_TRAFFIC_P0 to 1\n");
DbgMessage(NULL, INFORM, "lm_blink_traffic_led() port %d write to NIG_REG_LED_CONTROL_BLINK_RATE_P0 %x\n", port_idx, rate);
DbgMessage(NULL, INFORM, "lm_blink_traffic_led() set BLINK_TRAFFIC_P1 to 1\n");
DbgMessage(NULL, INFORM, "lm_blink_traffic_led() port %d write to NIG_REG_LED_CONTROL_BLINK_RATE_P1 0x%x\n", port_idx, rate);
DbgMessage(NULL, INFORM, "lm_get_led_status() port %d led_idx %d value %d\n", port_idx, led_idx, *value_ptr);
DbgMessage(NULL, INFORM, "lm_gpio_read: MISC_REG_GPIO value 0x%x mask 0x%x\n", reg_val, mask);
DbgMessage(NULL, INFORM, "lm_gpio_read: pin %d value is %x\n", pin_num, *value_ptr);
DbgMessage(pdev, INFORM, "Clear GPIO INT %d (shift %d) -> output low\n",
DbgMessage(pdev, INFORM, "Set GPIO INT %d (shift %d) -> output high\n",
DbgMessage(pdev, INFORM, "lm_gpio_int_write: pin %d value is %x\n",
DbgMessage(pdev, INFORM, "lm_spio_read: MISC_REG_SPIO value is 0x%x\n", reg_val);
DbgMessage(NULL, INFORM, "lm_spio_read: writing MISC_REG_SPIO 0x%x\n", reg_val);
DbgMessage(NULL, INFORM, "lm_spio_read: MISC_REG_SPIO value 0x%x\n", reg_val);
DbgMessage(NULL, INFORM, "lm_spio_read: pin %d value is 0x%x\n", pin_num, *value_ptr);
DbgMessage(NULL, INFORM, "lm_gpio_write: MISC_REG_SPIO value is 0x%x\n", reg_val);
DbgMessage(NULL, INFORM, "lm_spio_write: writing MISC_REG_SPIO 0x%x\n", reg_val);
DbgMessage(NULL, INFORM, "lm_set_led_mode() wrote to NIG_REG_LED_MODE (port %d) 0x%x\n", port_idx, mode_idx);
DbgMessage(NULL, INFORM, "lm_get_led_mode() read from NIG_REG_LED_MODE (port %d) 0x%x\n", port_idx, *mode_idx_ptr);
DbgMessage(NULL, INFORM, "lm_override_led_value() port %d led_idx %d value %d\n", port_idx, led_idx, value);
DbgMessage(pdev, INFORM, "oem_event 0x%x\n", event);
DbgMessage(pdev, INFORM, "lm_handle_deassertion_processing: attn_sig_aft_invert_1:0x%x; attn_sig_aft_invert_2:0x%x; attn_sig_aft_invert_3:0x%x; attn_sig_aft_invert_4:0x%x,attn_sig_aft_invert_5:0x%x\n",
DbgMessage(pdev, INFORM, "lm_handle_deassertion_processing: deassertion_proc_flgs:%d\n", deassertion_proc_flgs);
DbgMessage(pdev, INFORM, "lm_handle_deassertion_processing: BEFORE: aeu_mask_attn_func:0x%x\n", pdev->vars.aeu_mask_attn_func);
DbgMessage(pdev, INFORM, "lm_handle_deassertion_processing: AFTER : aeu_mask_attn_func:0x%x\n", pdev->vars.aeu_mask_attn_func);
DbgMessage(pdev, INFORM, "lm_handle_deassertion_processing: BEFORE: attn_state:0x%x\n", pdev->vars.attn_state);
DbgMessage(pdev, INFORM, "lm_handle_deassertion_processing: AFTER : attn_state:0x%x\n", pdev->vars.attn_state);
DbgMessage(pdev, INFORM, "lm_handle_assertion_processing: assertion_proc_flgs:%d\n", assertion_proc_flgs);
DbgMessage(pdev, INFORM, "lm_handle_assertion_processing: BEFORE: aeu_mask_attn_func:0x%x\n", pdev->vars.aeu_mask_attn_func);
DbgMessage(pdev, INFORM, "lm_handle_assertion_processing: AFTER : aeu_mask_attn_func:0x%x\n", pdev->vars.aeu_mask_attn_func);
DbgMessage(pdev, INFORM, "lm_handle_assertion_processing: BEFORE: attn_state:0x%x\n", pdev->vars.attn_state);
DbgMessage(pdev, INFORM, "lm_handle_assertion_processing: AFTER : attn_state:0x%x\n", pdev->vars.attn_state);
DbgMessage(pdev, INFORM, "shmem 0x%x validity map(0x%x)=0x%x\n", shmem, shmem + validity_offset, val);
DbgMessage(pdev, INFORM , "Cnt=%d Shmem validity map 0x%x\n",cnt, val);
DbgMessage(pdev, INFORM, "acquire_split_alr() - %d START!\n", FUNC_ID(pdev) );
DbgMessage(pdev, INFORM, "acquire_split_alr() - %d END!\n", FUNC_ID(pdev) );
DbgMessage(pdev, INFORM, "release_split_alr() - %d START!\n", FUNC_ID(pdev) );
DbgMessage(pdev, INFORM, "release_split_alr() - %d END!\n", FUNC_ID(pdev) );
DbgMessage(pdev, INFORM, "lm_mwrite\n");
DbgMessage(pdev, INFORM, "lm_mread\n");
DbgMessage(pdev, INFORM, "### set_d0_power_state\n");
DbgMessage(pdev, INFORM, "--- TCP Packet --- \n");
DbgMessage(pdev, INFORM, "--- UDP Packet --- \n");
DbgMessage(pdev, INFORM, " Checksum validated.\n");
DbgMessage(pdev, INFORM, " BAD checksum.\n");
DbgMessage(pdev, INFORM, " BAD IP checksum\n");
DbgMessage(pdev, INFORM, " GOOD checksum.\n");
DbgMessage(pdev, INFORM, " Checksum NOT validated.\n");
DbgMessage(pdev, INFORM, " TCP Options exist - forcing return value.\n");
DbgMessage(pdev, INFORM, " IP checksum invalid - reporting BAD checksum.\n");
DbgMessage(pdev, INFORM, " IP checksum ok - reporting GOOD checksum.\n");
DbgMessage(pdev, INFORM, "### lm_abort abort_op=%d idx=%d\n", abort_op, idx);
DbgMessage(pdev, INFORM, "Changing sq state from %d to %d\n", pdev->sq_info.sq_state, state);
DbgMessage(pdev, INFORM, "lm_sq_post: priority=%d, command=%d, type=%d, cid=%d num_pending_normal=%d\n",
DbgMessage(pdev, INFORM, "lm_sq_post: priority=%d, command=%d, type=%d, cid=%d num_pending_normal=%d\n",
DbgMessage(pdev, INFORM, "lm_sq_complete: priority=%d, command=%d, type=%d, cid=%d num_pending_normal=%d\n",
DbgMessage(pdev, INFORM, "lm_stats_hw_setup_mstat: mstat_tx_start=%x, mstat_tx_size=%x, mstat_rx_start=%x, mstat_rx_size=%x\n",mstat_tx_start,mstat_tx_size,mstat_rx_start, mstat_rx_size);
if (mac_query->field_collect != 0) { DbgMessage(pdev, INFORM, "assigning %s[=%x] to %s, width %d.\n", #field_collect, mac_query->field_collect, #field_mirror, field_width ); } \
DbgMessage(pdev, INFORM, "lm_stats_hw_mstat_assign: mac_query=%x\n", mac_query);
DbgMessage(pdev, INFORM, "lm_stats_hw_assign: device has MSTAT block.\n");
DbgMessage(pdev, INFORM, "Zero 'mirror' statistics...\n");
DbgMessage(NULL, INFORM, "lm_stats_alloc_hw_query: device has no MSTAT block.\n");
DbgMessage(NULL, INFORM, "lm_stats_alloc_hw_query: allocated a block of size %d at %x\n", alloc_size, stats_hw->u.s.addr_emac_stats_query);
DbgMessage(NULL, INFORM, "lm_stats_alloc_hw_query: addr_bmac1_stats_query = %x, addr_bmac2_stats_query=%x, addr_nig_stats_query=%x\n", stats_hw->u.s.addr_bmac1_stats_query, stats_hw->u.s.addr_bmac2_stats_query, stats_hw->addr_nig_stats_query);
DbgMessage(NULL, INFORM, "lm_stats_alloc_hw_query: device has an MSTAT block.\n");
DbgMessage(NULL, INFORM, "lm_stats_alloc_hw_query: allocated a block of size %d at %x\n", alloc_size, stats_hw->u.addr_mstat_stats_query);
DbgMessage(NULL, INFORM, "lm_stats_alloc_hw_query: stats_hw->addr_nig_stats_query=%x\n", stats_hw->addr_nig_stats_query);
DbgMessage(_pdev, INFORM, "rd 0x%04x = 0x%08x\n", _offset, _val); \
DbgMessage(_pdev, INFORM, "wr 0x%04x 0x%08x\n", _offset, _val); \
DbgMessage(pdev, INFORM, "### lm_sc_alloc_con_resc\n");
DbgMessage(pdev, INFORM, "### lm_sc_init_iscsi_context\n");
DbgMessage(pdev, INFORM, "### lm_fc_init_fcoe_context\n");
DbgMessage(pdev, INFORM, "### lm_fc_alloc_con_resc\n");
DbgMessage(pdev, INFORM, "### lm_sc_init\n");
DbgMessage(pdev, INFORM, "lm_sc_init: Illegal page size.\n");
DbgMessage(pdev, INFORM, "lm_sc_init: l5_eq_chain_cnt=%d\n.\n",pdev->iscsi_info.run_time.l5_eq_chain_cnt);
DbgMessage(pdev, INFORM, "### lm_fc_init\n");
DbgMessage(pdev, INFORM, "lm_fc_init: num_of_cqs=%d\n.\n",pdev->fcoe_info.run_time.num_of_cqs);