IGC_SUCCESS
s32 ret_val = IGC_SUCCESS;
return IGC_SUCCESS;
return IGC_SUCCESS;
return IGC_SUCCESS;
return IGC_SUCCESS;
s32 ret_val = IGC_SUCCESS;
return IGC_SUCCESS;
return IGC_SUCCESS;
return IGC_SUCCESS;
return IGC_SUCCESS;
return IGC_SUCCESS;
return IGC_SUCCESS;
return IGC_SUCCESS;
return IGC_SUCCESS;
s32 ret_val = IGC_SUCCESS;
s32 ret_val = IGC_SUCCESS;
ret_val = IGC_SUCCESS;
return IGC_SUCCESS;
return IGC_SUCCESS;
return IGC_SUCCESS;
return IGC_SUCCESS;
s32 ret_val = IGC_SUCCESS;
s32 ret_val = IGC_SUCCESS;
while (igc_get_hw_semaphore_i225(hw) != IGC_SUCCESS)
return IGC_SUCCESS;
s32 status = IGC_SUCCESS;
if (hw->nvm.ops.acquire(hw) == IGC_SUCCESS) {
if (status != IGC_SUCCESS)
s32 status = IGC_SUCCESS;
if (hw->nvm.ops.acquire(hw) == IGC_SUCCESS) {
if (status != IGC_SUCCESS)
s32 ret_val = IGC_SUCCESS;
ret_val = IGC_SUCCESS;
if (ret_val != IGC_SUCCESS) {
s32 status = IGC_SUCCESS;
if (hw->nvm.ops.acquire(hw) == IGC_SUCCESS) {
if (ret_val != IGC_SUCCESS) {
if (hw->nvm.ops.acquire(hw) == IGC_SUCCESS) {
if (ret_val != IGC_SUCCESS) {
s32 ret_val = IGC_SUCCESS;
s32 ret_val = IGC_SUCCESS;
return IGC_SUCCESS;
if (ret_val == IGC_SUCCESS)
if (ret_val != IGC_SUCCESS)
if (ret_val != IGC_SUCCESS)
ret_val = IGC_SUCCESS;
return IGC_SUCCESS;
return IGC_SUCCESS;
return IGC_SUCCESS;
return IGC_SUCCESS;
return IGC_SUCCESS;
return IGC_SUCCESS;
return IGC_SUCCESS;
return IGC_SUCCESS;
return IGC_SUCCESS;
return IGC_SUCCESS;
return IGC_SUCCESS; /* No link detected */
return IGC_SUCCESS;
return IGC_SUCCESS;
return IGC_SUCCESS;
return IGC_SUCCESS;
s32 ret_val = IGC_SUCCESS;
return IGC_SUCCESS;
return IGC_SUCCESS;
return IGC_SUCCESS;
return IGC_SUCCESS;
return IGC_SUCCESS;
return IGC_SUCCESS;
s32 ret_val = IGC_SUCCESS;
return IGC_SUCCESS;
return IGC_SUCCESS;
return IGC_SUCCESS;
return IGC_SUCCESS;
return IGC_SUCCESS;
return IGC_SUCCESS;
return IGC_SUCCESS;
IGC_BLK_PHY_RESET : IGC_SUCCESS;
s32 ret_val = IGC_SUCCESS;
return IGC_SUCCESS;
return IGC_SUCCESS;
return IGC_SUCCESS;
return IGC_SUCCESS;
return IGC_SUCCESS;
return IGC_SUCCESS;
return IGC_SUCCESS;
return IGC_SUCCESS;
s32 ret_val = IGC_SUCCESS;
return IGC_SUCCESS;
s32 ret_val = IGC_SUCCESS;
return IGC_SUCCESS;
return IGC_SUCCESS;
return IGC_SUCCESS;
if ((ret = igc_reset_hw(&igc->igc_hw)) != IGC_SUCCESS) {
IGC_SUCCESS) {
if ((ret = igc_read_mac_addr(&igc->igc_hw)) != IGC_SUCCESS) {
if ((ret = igc_get_phy_id(&igc->igc_hw)) != IGC_SUCCESS) {
VERIFY3S(ret, ==, IGC_SUCCESS);
if ((ret = igc_reset_hw(hw)) != IGC_SUCCESS) {
if ((ret = igc_init_hw(hw)) != IGC_SUCCESS) {
if ((ret = igc_set_d0_lplu_state(hw, false)) != IGC_SUCCESS) {
if ((ret = igc_set_eee_i225(hw, false, false, false)) != IGC_SUCCESS) {
if ((ret = igc_set_mac_type(&igc->igc_hw)) != IGC_SUCCESS) {
if ((ret = igc_setup_init_funcs(&igc->igc_hw, true)) != IGC_SUCCESS) {
if ((ret = igc_get_bus_info(&igc->igc_hw)) != IGC_SUCCESS) {
if (igc_setup_link(&igc->igc_hw) != IGC_SUCCESS) {
VERIFY3S(ret, ==, IGC_SUCCESS);
VERIFY3S(ret, ==, IGC_SUCCESS);