usr/src/uts/common/io/hxge/hpi_pfc.c

925

HXGE_REG_RD32(handle, HCR_REG + HCR_N_MAC_ADDRS, n_of_addrs);

usr/src/uts/common/io/hxge/hpi_pfc.c

942

HXGE_REG_RD32(handle, HCR_REG + HCR_ADDR_LO + slot * step, &addr_lo);

usr/src/uts/common/io/hxge/hpi_pfc.c

943

HXGE_REG_RD32(handle, HCR_REG + HCR_ADDR_HI + slot * step, &addr_hi);

usr/src/uts/common/io/hxge/hpi_rxdma.h

116

HXGE_REG_RD32(handle, (HXGE_RXDMA_OFFSET(reg, handle.is_vraddr,\

usr/src/uts/common/io/hxge/hpi_vir.c

107

HXGE_REG_RD32(handle, offset, ldf_p);

usr/src/uts/common/io/hxge/hpi_vir.c

163

HXGE_REG_RD32(handle, LD_INTR_MGMT + LDSV_OFFSET(ldg),

usr/src/uts/common/io/hxge/hpi_vir.c

257

HXGE_REG_RD32(handle, DEV_ERR_STAT, &statp->value);

usr/src/uts/common/io/hxge/hxge_hw.c

234

HXGE_REG_RD32(handle, PEU_INTR_STAT, &stat.value);

usr/src/uts/common/io/hxge/hxge_main.c

4404

HXGE_REG_RD32(handle, CIP_LINK_STAT, &link_stat.value);

usr/src/uts/common/io/hxge/hxge_main.c

4467

HXGE_REG_RD32(hxgep->hpi_msi_handle, i * 16, &msix_entry0);

usr/src/uts/common/io/hxge/hxge_main.c

4468

HXGE_REG_RD32(hxgep->hpi_msi_handle, i * 16 + 4, &msix_entry1);

usr/src/uts/common/io/hxge/hxge_main.c

4469

HXGE_REG_RD32(hxgep->hpi_msi_handle, i * 16 + 8, &msix_entry2);

usr/src/uts/common/io/hxge/hxge_main.c

4470

HXGE_REG_RD32(hxgep->hpi_msi_handle, i * 16 + 12, &msix_entry3);

usr/src/uts/common/io/hxge/hxge_pfc.c

154

HXGE_REG_RD32(hxgep->hpi_reg_handle, PHY_DEBUG_TRAINING_VEC,