GRCBASE_UPB
{GRCBASE_UPB + PB_REG_PB_PRTY_MASK,
GRCBASE_UPB + PB_REG_PB_PRTY_STS_CLR, 0xf,
IDLE_CHK_1(0x1F, GRCBASE_UPB + PB_REG_PB_PRTY_STS, (val != 0), IDLE_CHK_WARNING, "UPB: parity status is not 0");
IDLE_CHK_1(0x1F, GRCBASE_UPB + PB_REG_PB_INT_STS, (val != 0), IDLE_CHK_ERROR, "UPB: Interrupt status is not 0");
REG_WR(pdev,GRCBASE_UPB+PB_REG_PB_INT_MASK ,0);