GMAC_WRITE_2
GMAC_WRITE_2(dev, pnum, GM_GP_CTRL, 0);
GMAC_WRITE_2(dev, pnum, GM_RX_CTRL, GM_RXCR_CRC_DIS);
GMAC_WRITE_2(dev, pnum, GM_TX_CTRL, TX_COL_THR(TX_COL_DEF));
GMAC_WRITE_2(dev, pnum, GM_TX_FLOW_CTRL, 0xffff);
GMAC_WRITE_2(dev, pnum, GM_TX_PARAM,
GMAC_WRITE_2(dev, pnum, GM_SERIAL_MODE, gmac);
GMAC_WRITE_2(dev, pnum, GM_TX_IRQ_MSK, 0);
GMAC_WRITE_2(dev, pnum, GM_RX_IRQ_MSK, 0);
GMAC_WRITE_2(dev, pnum, GM_TR_IRQ_MSK, 0);
GMAC_WRITE_2(port->p_dev, port->p_port, GM_GP_CTRL, gmac);
GMAC_WRITE_2(dev, pnum, GM_GP_CTRL, val);
GMAC_WRITE_2(dev, pnum, GM_SMI_CTRL,
GMAC_WRITE_2(dev, pnum, GM_PHY_ADDR, gmac | GM_PAR_MIB_CLR);
GMAC_WRITE_2(dev, pnum, GM_PHY_ADDR, gmac);
GMAC_WRITE_2(dev, pnum, GM_PHY_ADDR, gmac | GM_PAR_MIB_CLR);
GMAC_WRITE_2(dev, pnum, GM_PHY_ADDR, gmac);
GMAC_WRITE_2(dev, pnum, GM_SMI_DATA, val);
GMAC_WRITE_2(dev, pnum, GM_SMI_CTRL,
GMAC_WRITE_2(dev, port->p_port, GM_GP_CTRL, gpcr);
GMAC_WRITE_2(dev, port->p_port, GM_GP_CTRL, gpcr);
GMAC_WRITE_2(dev, pnum, GM_SRC_ADDR_1L + i * 4,
GMAC_WRITE_2(dev, pnum, GM_SRC_ADDR_2L + i * 4,
GMAC_WRITE_2(dev, pnum, GM_MC_ADDR_H1, mchash[0] & 0xffff);
GMAC_WRITE_2(dev, pnum, GM_MC_ADDR_H2, (mchash[0] >> 16) & 0xffff);
GMAC_WRITE_2(dev, pnum, GM_MC_ADDR_H3, mchash[1] & 0xffff);
GMAC_WRITE_2(dev, pnum, GM_MC_ADDR_H4, (mchash[1] >> 16) & 0xffff);
GMAC_WRITE_2(dev, pnum, GM_RX_CTRL, mode);