GENMASK
#define ENAHW_CMD_ID_MASK GENMASK(11, 0)
#define ENAHW_RESP_CMD_ID_MASK GENMASK(11, 0)
#define ENAHW_TX_DESC_LENGTH_MASK GENMASK(15, 0)
#define ENAHW_TX_DESC_REQ_ID_HI_MASK GENMASK(21, 16)
#define ENAHW_TX_DESC_L3_PROTO_IDX_MASK GENMASK(3, 0)
#define ENAHW_TX_DESC_L4_PROTO_IDX_MASK GENMASK(12, 8)
#define ENAHW_TX_DESC_REQ_ID_LO_MASK GENMASK(31, 22)
#define ENAHW_TX_DESC_ADDR_HI_MASK GENMASK(15, 0)
#define ENAHW_TX_DESC_HEADER_LENGTH_MASK GENMASK(31, 24)
#define ENAHW_TX_META_DESC_REQ_ID_LO_MASK GENMASK(9, 0)
#define ENAHW_TX_META_DESC_MSS_HI_MASK GENMASK(19, 16)
#define ENAHW_TX_META_DESC_REQ_ID_HI_MASK GENMASK(5, 0)
#define ENAHW_TX_META_DESC_L3_HDR_LEN_MASK GENMASK(7, 0)
#define ENAHW_TX_META_DESC_L3_HDR_OFF_MASK GENMASK(15, 8)
#define ENAHW_TX_META_DESC_L4_HDR_LEN_MASK GENMASK(21, 16)
#define ENAHW_TX_META_DESC_MSS_LO_MASK GENMASK(31, 22)
#define ENAHW_RX_CDESC_L3_PROTO_MASK GENMASK(4, 0)
#define ENAHW_RX_CDESC_SRC_VLAN_CNT_MASK GENMASK(6, 5)
#define ENAHW_RX_CDESC_L4_PROTO_MASK GENMASK(12, 8)
#define ENAHW_REG_INTR_RX_DELAY_MASK GENMASK(14, 0)
#define ENAHW_REG_INTR_TX_DELAY_MASK GENMASK(29, 15)
#define ENAHW_HOST_INFO_MAJOR_MASK GENMASK(7, 0)
#define ENAHW_HOST_INFO_MINOR_MASK GENMASK(15, 8)
#define ENAHW_HOST_INFO_SUB_MINOR_MASK GENMASK(23, 16)
#define ENAHW_HOST_INFO_MODULE_TYPE_MASK GENMASK(31, 24)
#define ENAHW_HOST_INFO_FUNCTION_MASK GENMASK(2, 0)
#define ENAHW_HOST_INFO_DEVICE_MASK GENMASK(7, 3)
#define ENAHW_HOST_INFO_BUS_MASK GENMASK(15, 8)
#define ENAHW_CMD_CREATE_CQ_DESC_SIZE_WORDS_MASK (GENMASK(4, 0))
#define ENAHW_CMD_CREATE_SQ_DIR_MASK GENMASK(7, 5)
#define ENAHW_CMD_CREATE_SQ_PLACEMENT_POLICY_MASK GENMASK(3, 0)
#define ENAHW_CMD_CREATE_SQ_COMPLETION_POLICY_MASK GENMASK(6, 4)
#define ENAHW_CMD_DESTROY_SQ_DIR_MASK GENMASK(7, 5)