usr/src/uts/i86pc/io/apix/apix_regops.c

118

wrmsr((REG_X2APIC_BASE_MSR + (APIC_INT_CMD1 >> 2)),

usr/src/uts/i86pc/io/apix/apix_regops.c

276

while (local_apic_regs_ops.apic_read(APIC_INT_CMD1) & AV_PENDING)

usr/src/uts/i86pc/io/pcplusmp/apic_common.c

1407

apic_reg_ops->apic_write(APIC_INT_CMD1,

usr/src/uts/i86pc/io/pcplusmp/apic_common.c

1442

apic_reg_ops->apic_write(APIC_INT_CMD1,

usr/src/uts/i86pc/io/pcplusmp/apic_common.c

486

apic_reg_ops->apic_read(APIC_INT_CMD1) & AV_PENDING)

usr/src/uts/i86pc/io/pcplusmp/apic_common.c

771

while ((status = apic_reg_ops->apic_read(APIC_INT_CMD1))

usr/src/uts/i86pc/io/pcplusmp/apic_regops.c

118

apicadr[APIC_INT_CMD1] = cmd1;

usr/src/uts/i86pc/sys/apic.h

683

while (apic_reg_ops->apic_read(APIC_INT_CMD1) & AV_PENDING) \