Symbol: FZC_ZCP
usr/src/uts/common/io/nxge/nxge_ndd.c
2239
{"FZC_ZCP", FZC_ZCP},
usr/src/uts/common/sys/nxge/nxge_rxdma_hw.h
78
#define RDC_TBL_REG (FZC_ZCP + 0x10000)
usr/src/uts/common/sys/nxge/nxge_zcp_hw.h
102
#define ZCP_CFIFO_ECC_PORT0_REG (FZC_ZCP + 0x000A0)
usr/src/uts/common/sys/nxge/nxge_zcp_hw.h
103
#define ZCP_CFIFO_ECC_PORT1_REG (FZC_ZCP + 0x000A8)
usr/src/uts/common/sys/nxge/nxge_zcp_hw.h
104
#define ZCP_CFIFO_ECC_PORT2_REG (FZC_ZCP + 0x000B0)
usr/src/uts/common/sys/nxge/nxge_zcp_hw.h
105
#define ZCP_CFIFO_ECC_PORT3_REG (FZC_ZCP + 0x000B8)
usr/src/uts/common/sys/nxge/nxge_zcp_hw.h
40
#define ZCP_CONFIG_REG (FZC_ZCP + 0x00000)
usr/src/uts/common/sys/nxge/nxge_zcp_hw.h
41
#define ZCP_INT_STAT_REG (FZC_ZCP + 0x00008)
usr/src/uts/common/sys/nxge/nxge_zcp_hw.h
42
#define ZCP_INT_STAT_TEST_REG (FZC_ZCP + 0x00108)
usr/src/uts/common/sys/nxge/nxge_zcp_hw.h
43
#define ZCP_INT_MASK_REG (FZC_ZCP + 0x00010)
usr/src/uts/common/sys/nxge/nxge_zcp_hw.h
45
#define ZCP_BAM4_RE_CTL_REG (FZC_ZCP + 0x00018)
usr/src/uts/common/sys/nxge/nxge_zcp_hw.h
46
#define ZCP_BAM8_RE_CTL_REG (FZC_ZCP + 0x00020)
usr/src/uts/common/sys/nxge/nxge_zcp_hw.h
47
#define ZCP_BAM16_RE_CTL_REG (FZC_ZCP + 0x00028)
usr/src/uts/common/sys/nxge/nxge_zcp_hw.h
48
#define ZCP_BAM32_RE_CTL_REG (FZC_ZCP + 0x00030)
usr/src/uts/common/sys/nxge/nxge_zcp_hw.h
50
#define ZCP_DST4_RE_CTL_REG (FZC_ZCP + 0x00038)
usr/src/uts/common/sys/nxge/nxge_zcp_hw.h
51
#define ZCP_DST8_RE_CTL_REG (FZC_ZCP + 0x00040)
usr/src/uts/common/sys/nxge/nxge_zcp_hw.h
52
#define ZCP_DST16_RE_CTL_REG (FZC_ZCP + 0x00048)
usr/src/uts/common/sys/nxge/nxge_zcp_hw.h
53
#define ZCP_DST32_RE_CTL_REG (FZC_ZCP + 0x00050)
usr/src/uts/common/sys/nxge/nxge_zcp_hw.h
55
#define ZCP_RAM_DATA_REG (FZC_ZCP + 0x00058)
usr/src/uts/common/sys/nxge/nxge_zcp_hw.h
56
#define ZCP_RAM_DATA0_REG (FZC_ZCP + 0x00058)
usr/src/uts/common/sys/nxge/nxge_zcp_hw.h
57
#define ZCP_RAM_DATA1_REG (FZC_ZCP + 0x00060)
usr/src/uts/common/sys/nxge/nxge_zcp_hw.h
58
#define ZCP_RAM_DATA2_REG (FZC_ZCP + 0x00068)
usr/src/uts/common/sys/nxge/nxge_zcp_hw.h
59
#define ZCP_RAM_DATA3_REG (FZC_ZCP + 0x00070)
usr/src/uts/common/sys/nxge/nxge_zcp_hw.h
60
#define ZCP_RAM_DATA4_REG (FZC_ZCP + 0x00078)
usr/src/uts/common/sys/nxge/nxge_zcp_hw.h
61
#define ZCP_RAM_BE_REG (FZC_ZCP + 0x00080)
usr/src/uts/common/sys/nxge/nxge_zcp_hw.h
62
#define ZCP_RAM_ACC_REG (FZC_ZCP + 0x00088)
usr/src/uts/common/sys/nxge/nxge_zcp_hw.h
64
#define ZCP_TRAINING_VECTOR_REG (FZC_ZCP + 0x000C0)
usr/src/uts/common/sys/nxge/nxge_zcp_hw.h
65
#define ZCP_STATE_MACHINE_REG (FZC_ZCP + 0x000C8)
usr/src/uts/common/sys/nxge/nxge_zcp_hw.h
66
#define ZCP_CHK_BIT_DATA_REG (FZC_ZCP + 0x00090)
usr/src/uts/common/sys/nxge/nxge_zcp_hw.h
67
#define ZCP_RESET_CFIFO_REG (FZC_ZCP + 0x00098)