Symbol: FPGA_TP_ADDR_INTERRUPT_ENABLE
usr/src/uts/common/io/chxge/com/tp.c
322
t1_write_reg_4(tp->adapter, FPGA_TP_ADDR_INTERRUPT_ENABLE,
usr/src/uts/common/io/chxge/com/tp.c
343
t1_write_reg_4(tp->adapter, FPGA_TP_ADDR_INTERRUPT_ENABLE, 0);