usr/src/uts/intel/io/fdc.c

1912

enable_code = inb(fcp->c_regbase + FCR_SRB) & FSB_DSDEF;

usr/src/uts/intel/io/fdc.c

1914

outb(fcp->c_regbase + FCR_SRB, enable_code | ds_code);

usr/src/uts/intel/io/fdc.c

589

fcp->c_mode = (inb(fcp->c_regbase + FCR_SRB) & 0x1c) ?

usr/src/uts/intel/io/fdc.c

789

if (inb(fcp->c_regbase + FCR_SRB) != 0x00)

usr/src/uts/intel/io/fdc.c

793

if (inb(fcp->c_regbase + FCR_SRB) != 0x65)

usr/src/uts/intel/io/fdc.c

797

result = inb(fcp->c_regbase + FCR_SRB);

usr/src/uts/intel/io/fdc.c

817

if (inb(fcp->c_regbase + FCR_SRB) != 0x00)

usr/src/uts/intel/io/fdc.c

821

if (inb(fcp->c_regbase + FCR_SRB) != 0x66)

usr/src/uts/intel/io/fdc.c

825

result = inb(fcp->c_regbase + FCR_SRB);