usr/src/uts/i86pc/io/amd_iommu/amd_iommu_cmd.c

122

AMD_IOMMU_REG_SET32(&cmdptr[1], AMD_IOMMU_CMD_INVAL_PAGES_DOMAINID,

usr/src/uts/i86pc/io/amd_iommu/amd_iommu_cmd.c

124

AMD_IOMMU_REG_SET32(&cmdptr[1], AMD_IOMMU_CMD_OPCODE, 0x03);

usr/src/uts/i86pc/io/amd_iommu/amd_iommu_cmd.c

125

AMD_IOMMU_REG_SET32(&cmdptr[2], AMD_IOMMU_CMD_INVAL_PAGES_PDE,

usr/src/uts/i86pc/io/amd_iommu/amd_iommu_cmd.c

127

AMD_IOMMU_REG_SET32(&cmdptr[2], AMD_IOMMU_CMD_INVAL_PAGES_S,

usr/src/uts/i86pc/io/amd_iommu/amd_iommu_cmd.c

129

AMD_IOMMU_REG_SET32(&cmdptr[2], AMD_IOMMU_CMD_INVAL_PAGES_ADDR_LO,

usr/src/uts/i86pc/io/amd_iommu/amd_iommu_cmd.c

153

AMD_IOMMU_REG_SET32(&cmdptr[0], AMD_IOMMU_CMD_INVAL_IOTLB_DEVICEID,

usr/src/uts/i86pc/io/amd_iommu/amd_iommu_cmd.c

155

AMD_IOMMU_REG_SET32(&cmdptr[0], AMD_IOMMU_CMD_INVAL_IOTLB_MAXPEND,

usr/src/uts/i86pc/io/amd_iommu/amd_iommu_cmd.c

157

AMD_IOMMU_REG_SET32(&cmdptr[1], AMD_IOMMU_CMD_OPCODE, 0x04);

usr/src/uts/i86pc/io/amd_iommu/amd_iommu_cmd.c

158

AMD_IOMMU_REG_SET32(&cmdptr[1], AMD_IOMMU_CMD_INVAL_IOTLB_QUEUEID,

usr/src/uts/i86pc/io/amd_iommu/amd_iommu_cmd.c

160

AMD_IOMMU_REG_SET32(&cmdptr[2], AMD_IOMMU_CMD_INVAL_IOTLB_ADDR_LO,

usr/src/uts/i86pc/io/amd_iommu/amd_iommu_cmd.c

162

AMD_IOMMU_REG_SET32(&cmdptr[2], AMD_IOMMU_CMD_INVAL_IOTLB_S,

usr/src/uts/i86pc/io/amd_iommu/amd_iommu_cmd.c

186

AMD_IOMMU_REG_SET32(&cmdptr[0], AMD_IOMMU_CMD_INVAL_INTR_DEVICEID,

usr/src/uts/i86pc/io/amd_iommu/amd_iommu_cmd.c

188

AMD_IOMMU_REG_SET32(&cmdptr[1], AMD_IOMMU_CMD_OPCODE, 0x05);

usr/src/uts/i86pc/io/amd_iommu/amd_iommu_cmd.c

62

AMD_IOMMU_REG_SET32(&cmdptr[0], AMD_IOMMU_CMD_COMPL_WAIT_S, 0);

usr/src/uts/i86pc/io/amd_iommu/amd_iommu_cmd.c

63

AMD_IOMMU_REG_SET32(&cmdptr[0], AMD_IOMMU_CMD_COMPL_WAIT_I, 1);

usr/src/uts/i86pc/io/amd_iommu/amd_iommu_cmd.c

64

AMD_IOMMU_REG_SET32(&cmdptr[0], AMD_IOMMU_CMD_COMPL_WAIT_F,

usr/src/uts/i86pc/io/amd_iommu/amd_iommu_cmd.c

66

AMD_IOMMU_REG_SET32(&cmdptr[0], AMD_IOMMU_CMD_COMPL_WAIT_STORE_ADDR_LO,

usr/src/uts/i86pc/io/amd_iommu/amd_iommu_cmd.c

68

AMD_IOMMU_REG_SET32(&cmdptr[1], AMD_IOMMU_CMD_OPCODE, 0x01);

usr/src/uts/i86pc/io/amd_iommu/amd_iommu_cmd.c

69

AMD_IOMMU_REG_SET32(&cmdptr[1], AMD_IOMMU_CMD_COMPL_WAIT_STORE_ADDR_HI,

usr/src/uts/i86pc/io/amd_iommu/amd_iommu_cmd.c

97

AMD_IOMMU_REG_SET32(&cmdptr[0], AMD_IOMMU_CMD_INVAL_DEVTAB_DEVICEID,

usr/src/uts/i86pc/io/amd_iommu/amd_iommu_cmd.c

99

AMD_IOMMU_REG_SET32(&cmdptr[1], AMD_IOMMU_CMD_OPCODE, 0x02);