Symbol: AMD_IOMMU_REG_GET64
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_cmd.c
116
addr_lo = AMD_IOMMU_REG_GET64(REGADDR64(&cmdargsp->ca_addr),
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_cmd.c
118
addr_hi = AMD_IOMMU_REG_GET64(REGADDR64(&cmdargsp->ca_addr),
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_cmd.c
147
addr_lo = AMD_IOMMU_REG_GET64(REGADDR64(&cmdargsp->ca_addr),
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_cmd.c
150
addr_hi = AMD_IOMMU_REG_GET64(REGADDR64(&cmdargsp->ca_addr),
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_cmd.c
266
cmdhead_off = AMD_IOMMU_REG_GET64(
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_cmd.c
37
while (AMD_IOMMU_REG_GET64(REGADDR64(
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_impl.c
547
ASSERT(AMD_IOMMU_REG_GET64(REGADDR64(iommu->aiomt_reg_status_va),
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_impl.c
549
ASSERT(AMD_IOMMU_REG_GET64(REGADDR64(iommu->aiomt_reg_status_va),
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_impl.c
625
if (AMD_IOMMU_REG_GET64(REGADDR64(iommu->aiomt_reg_status_va),
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_impl.c
639
if (AMD_IOMMU_REG_GET64(REGADDR64(iommu->aiomt_reg_status_va),
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_log.c
522
evtail_off = AMD_IOMMU_REG_GET64(
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_page_tables.c
1008
if (AMD_IOMMU_REG_GET64(ptep, AMD_IOMMU_PTDE_PR) == 1) {
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_page_tables.c
1017
R = AMD_IOMMU_REG_GET64(ptep, AMD_IOMMU_PTDE_IR);
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_page_tables.c
1018
W = AMD_IOMMU_REG_GET64(ptep, AMD_IOMMU_PTDE_IW);
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_page_tables.c
1030
ASSERT(AMD_IOMMU_REG_GET64(ptep, AMD_IOMMU_PTDE_ADDR)
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_page_tables.c
1067
ASSERT(AMD_IOMMU_REG_GET64(ptep, AMD_IOMMU_PTDE_PR) == 1);
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_page_tables.c
1169
next_level = AMD_IOMMU_REG_GET64(ptdep,
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_page_tables.c
1172
if (AMD_IOMMU_REG_GET64(ptdep, AMD_IOMMU_PTDE_PR) == 1) {
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_page_tables.c
1188
ASSERT(AMD_IOMMU_REG_GET64(ptdep,
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_page_tables.c
1345
pa_4K = AMD_IOMMU_REG_GET64(ptep, AMD_IOMMU_PTDE_ADDR);
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_page_tables.c
335
if (AMD_IOMMU_REG_GET64(&(devtbl_entry[0]), AMD_IOMMU_DEVTBL_V) == 0 &&
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_page_tables.c
336
AMD_IOMMU_REG_GET64(&(devtbl_entry[0]), AMD_IOMMU_DEVTBL_TV) == 0) {
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_page_tables.c
340
if (AMD_IOMMU_REG_GET64(&(devtbl_entry[0]), AMD_IOMMU_DEVTBL_V) == 1 &&
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_page_tables.c
341
AMD_IOMMU_REG_GET64(&(devtbl_entry[0]), AMD_IOMMU_DEVTBL_TV) == 1) {
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_page_tables.c
344
AMD_IOMMU_REG_GET64(&(devtbl_entry[0]),
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_page_tables.c
347
ASSERT(dp->d_domainid == AMD_IOMMU_REG_GET64(&(devtbl_entry[1]),
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_page_tables.c
449
V = AMD_IOMMU_REG_GET64(&(devtbl_entry[0]), AMD_IOMMU_DEVTBL_V);
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_page_tables.c
450
TV = AMD_IOMMU_REG_GET64(&(devtbl_entry[0]), AMD_IOMMU_DEVTBL_TV);
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_page_tables.c
590
if (AMD_IOMMU_REG_GET64(&(devtbl_entry[0]), AMD_IOMMU_DEVTBL_TV) == 0) {
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_page_tables.c
595
ASSERT(dp->d_pgtable_root_4K == AMD_IOMMU_REG_GET64(&(devtbl_entry[0]),
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_page_tables.c
598
ASSERT(domainid == AMD_IOMMU_REG_GET64(&(devtbl_entry[1]),
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_page_tables.c
728
if (AMD_IOMMU_REG_GET64(pdtep, AMD_IOMMU_PTDE_PR) == 0) {
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_page_tables.c
735
pgtable_pa_4K = AMD_IOMMU_REG_GET64(pdtep, AMD_IOMMU_PTDE_ADDR);
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_page_tables.c
761
ASSERT(AMD_IOMMU_REG_GET64(&(pte_array[i]),
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_page_tables.c
939
ASSERT(AMD_IOMMU_REG_GET64(&(pte_array[i]),
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_page_tables.c
970
if (AMD_IOMMU_REG_GET64(pdep, AMD_IOMMU_PTDE_PR) == 1) {
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_page_tables.c
974
ASSERT(AMD_IOMMU_REG_GET64(pdep, AMD_IOMMU_PTDE_ADDR)
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_page_tables.c
993
ASSERT(AMD_IOMMU_REG_GET64(pdep, AMD_IOMMU_PTDE_PR) == 1);