usr/src/uts/common/sys/nxge/nxge_n2_esr_hw.h

65

#define ESR_N2_PLL_CFG_REG ESR_N2_BASE + ESR_N2_PLL_REG_OFFSET

usr/src/uts/common/sys/nxge/nxge_n2_esr_hw.h

66

#define ESR_N2_PLL_CFG_L_REG ESR_N2_BASE + ESR_N2_PLL_REG_OFFSET

usr/src/uts/common/sys/nxge/nxge_n2_esr_hw.h

67

#define ESR_N2_PLL_CFG_H_REG ESR_N2_BASE + ESR_N2_PLL_REG_OFFSET + 1

usr/src/uts/common/sys/nxge/nxge_n2_esr_hw.h

68

#define ESR_N2_PLL_STS_REG ESR_N2_BASE + ESR_N2_PLL_REG_OFFSET + 2

usr/src/uts/common/sys/nxge/nxge_n2_esr_hw.h

69

#define ESR_N2_PLL_STS_L_REG ESR_N2_BASE + ESR_N2_PLL_REG_OFFSET + 2

usr/src/uts/common/sys/nxge/nxge_n2_esr_hw.h

70

#define ESR_N2_PLL_STS_H_REG ESR_N2_BASE + ESR_N2_PLL_REG_OFFSET + 3

usr/src/uts/common/sys/nxge/nxge_n2_esr_hw.h

71

#define ESR_N2_TEST_CFG_REG ESR_N2_BASE + ESR_N2_TEST_REG_OFFSET

usr/src/uts/common/sys/nxge/nxge_n2_esr_hw.h

72

#define ESR_N2_TEST_CFG_L_REG ESR_N2_BASE + ESR_N2_TEST_REG_OFFSET

usr/src/uts/common/sys/nxge/nxge_n2_esr_hw.h

73

#define ESR_N2_TEST_CFG_H_REG ESR_N2_BASE + ESR_N2_TEST_REG_OFFSET + 1

usr/src/uts/common/sys/nxge/nxge_n2_esr_hw.h

75

#define ESR_N2_TX_CFG_REG_ADDR(chan) (ESR_N2_BASE + ESR_N2_TX_REG_OFFSET +\

usr/src/uts/common/sys/nxge/nxge_n2_esr_hw.h

77

#define ESR_N2_TX_CFG_L_REG_ADDR(chan) (ESR_N2_BASE + ESR_N2_TX_REG_OFFSET +\

usr/src/uts/common/sys/nxge/nxge_n2_esr_hw.h

79

#define ESR_N2_TX_CFG_H_REG_ADDR(chan) (ESR_N2_BASE + ESR_N2_TX_REG_OFFSET +\

usr/src/uts/common/sys/nxge/nxge_n2_esr_hw.h

81

#define ESR_N2_TX_STS_REG_ADDR(chan) (ESR_N2_BASE + ESR_N2_TX_REG_OFFSET +\

usr/src/uts/common/sys/nxge/nxge_n2_esr_hw.h

83

#define ESR_N2_TX_STS_L_REG_ADDR(chan) (ESR_N2_BASE + ESR_N2_TX_REG_OFFSET +\

usr/src/uts/common/sys/nxge/nxge_n2_esr_hw.h

85

#define ESR_N2_TX_STS_H_REG_ADDR(chan) (ESR_N2_BASE + ESR_N2_TX_REG_OFFSET +\

usr/src/uts/common/sys/nxge/nxge_n2_esr_hw.h

87

#define ESR_N2_RX_CFG_REG_ADDR(chan) (ESR_N2_BASE + ESR_N2_RX_REG_OFFSET +\

usr/src/uts/common/sys/nxge/nxge_n2_esr_hw.h

89

#define ESR_N2_RX_CFG_L_REG_ADDR(chan) (ESR_N2_BASE + ESR_N2_RX_REG_OFFSET +\

usr/src/uts/common/sys/nxge/nxge_n2_esr_hw.h

91

#define ESR_N2_RX_CFG_H_REG_ADDR(chan) (ESR_N2_BASE + ESR_N2_RX_REG_OFFSET +\

usr/src/uts/common/sys/nxge/nxge_n2_esr_hw.h

93

#define ESR_N2_RX_STS_REG_ADDR(chan) (ESR_N2_BASE + ESR_N2_RX_REG_OFFSET +\

usr/src/uts/common/sys/nxge/nxge_n2_esr_hw.h

95

#define ESR_N2_RX_STS_L_REG_ADDR(chan) (ESR_N2_BASE + ESR_N2_RX_REG_OFFSET +\

usr/src/uts/common/sys/nxge/nxge_n2_esr_hw.h

97

#define ESR_N2_RX_STS_H_REG_ADDR(chan) (ESR_N2_BASE + ESR_N2_RX_REG_OFFSET +\