usr/src/uts/intel/io/ecpp.c

1479

if (status & ECPP_PE) {

usr/src/uts/intel/io/ecpp.c

1660

if ((pp->saved_dsr & ECPP_PE) ||

usr/src/uts/intel/io/ecpp.c

1743

if ((dsr & ECPP_PE) ||

usr/src/uts/intel/io/ecpp.c

1779

status = (dsr & (ECPP_SLCT | ECPP_PE | ECPP_nERR)) |

usr/src/uts/intel/io/ecpp.c

3988

if ((dsr & ECPP_PE) || ((dsr & statmask) != statmask)) {

usr/src/uts/intel/io/ecpp.c

4166

if ((dsr & (ECPP_PE | ECPP_nBUSY | ECPP_SLCT)) !=

usr/src/uts/intel/io/ecpp.c

4181

if (wait_dsr(pp, ECPP_PE, ECPP_PE, 35000) < 0) {

usr/src/uts/intel/io/ecpp.c

4216

if ((dsr & (ECPP_PE | ECPP_nERR)) == 0) {

usr/src/uts/intel/io/ecpp.c

4288

if (wait_dsr(pp, ECPP_nERR | ECPP_SLCT | ECPP_PE | ECPP_nACK,

usr/src/uts/intel/io/ecpp.c

4289

ECPP_nERR | ECPP_SLCT | ECPP_PE, 35000) < 0) {

usr/src/uts/intel/io/ecpp.c

4760

if (wait_dsr(pp, ECPP_PE, 0, 35000) < 0) {

usr/src/uts/intel/io/ecpp.c

4881

if (wait_dsr(pp, ECPP_PE, ECPP_PE, 35000) < 0) {

usr/src/uts/intel/io/ecpp.c

5163

pp->current_phase = (DSR_READ(pp) & (ECPP_nERR | ECPP_PE))

usr/src/uts/intel/io/ecpp.c

5196

pp->current_phase = (DSR_READ(pp) & (ECPP_nERR | ECPP_PE))

usr/src/uts/intel/io/ecpp.c

5233

if ((dsr & (ECPP_PE | ECPP_nERR)) == 0) {